X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=VHDL.hs;h=eac7079155bd8d0b89e02aa441b321e9be890874;hb=5f9b7f3e0c999e765f75b0c48b0f675d99842cea;hp=5516d00b3729fad13937939eaab9d9fe4f95156a;hpb=4c4b23981da0a67031547c8ff7e4b2a43698dd46;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/VHDL.hs b/VHDL.hs
index 5516d00..eac7079 100644
--- a/VHDL.hs
+++ b/VHDL.hs
@@ -22,26 +22,26 @@ import TranslatorTypes
 createEntity ::
   HsFunction        -- | The function signature
   -> FuncData       -- | The function data collected so far
-  -> FuncData       -- | The modified function data
+  -> VHDLState ()
 
 createEntity hsfunc fdata = 
   let func = flatFunc fdata in
   case func of
     -- Skip (builtin) functions without a FlatFunction
-    Nothing -> fdata
+    Nothing -> do return ()
     -- Create an entity for all other functions
     Just flatfunc ->
       
       let 
-        s       = sigs flatfunc
-        a       = args flatfunc
-        r       = res  flatfunc
-        args'   = map (fmap (mkMap s)) a
-        res'    = fmap (mkMap s) r
+        sigs    = flat_sigs flatfunc
+        args    = flat_args flatfunc
+        res     = flat_res  flatfunc
+        args'   = map (fmap (mkMap sigs)) args
+        res'    = fmap (mkMap sigs) res
         ent_decl' = createEntityAST hsfunc args' res'
         entity' = Entity args' res' (Just ent_decl')
       in
-        fdata { entity = Just entity' }
+        setEntity hsfunc entity'
   where
     mkMap :: Eq id => [(id, SignalInfo)] -> id -> (AST.VHDLId, AST.TypeMark)
     mkMap sigmap id =
@@ -85,16 +85,80 @@ mkEntityId hsfunc =
   -- TODO: This doesn't work for functions with multiple signatures!
   mkVHDLId $ hsFuncName hsfunc
 
+-- | Create an architecture for a given function
+createArchitecture ::
+  HsFunction        -- | The function signature
+  -> FuncData       -- | The function data collected so far
+  -> VHDLState ()
+
+createArchitecture hsfunc fdata = 
+  let func = flatFunc fdata in
+  case func of
+    -- Skip (builtin) functions without a FlatFunction
+    Nothing -> do return ()
+    -- Create an architecture for all other functions
+    Just flatfunc ->
+      let 
+        sigs      = flat_sigs flatfunc
+        args      = flat_args flatfunc
+        res       = flat_res  flatfunc
+        apps      = flat_apps flatfunc
+        entity_id = Maybe.fromMaybe
+                      (error $ "Building architecture without an entity? This should not happen!")
+                      (getEntityId fdata)
+        -- Create signal declarations for all signals that are not in args and
+        -- res
+        sig_decs = [mkSigDec info | (id, info) <- sigs, (all (id `Foldable.notElem`) (res:args)) ]
+        -- Create component instantiations for all function applications
+        insts    = map (AST.CSISm . mkCompInsSm) apps
+        arch     = AST.ArchBody (mkVHDLId "structural") (AST.NSimple entity_id) (map AST.BDISD sig_decs) insts
+      in
+        setArchitecture hsfunc arch
+
+mkSigDec :: SignalInfo -> AST.SigDec
+mkSigDec info =
+    AST.SigDec (mkVHDLId name) (vhdl_ty ty) Nothing
+  where
+    name = Maybe.fromMaybe
+      (error $ "Unnamed signal? This should not happen!")
+      (sigName info)
+    ty = sigTy info
+
+-- | Transforms a flat function application to a VHDL component instantiation.
+mkCompInsSm ::
+  FApp UnnamedSignal  -- | The application to look at.
+  -> AST.CompInsSm    -- | The corresponding VHDL component instantiation.
+
+mkCompInsSm app =
+  AST.CompInsSm label (AST.IUEntity (AST.NSimple entity_id)) (AST.PMapAspect portmaps)
+  where
+    entity_id = mkVHDLId "foo"
+    label     = mkVHDLId "app"
+    portmaps  = []
+
+-- | Extracts the generated entity id from the given funcdata
+getEntityId :: FuncData -> Maybe AST.VHDLId
+getEntityId fdata =
+  case funcEntity fdata of
+    Nothing -> Nothing
+    Just e  -> case ent_decl e of
+      Nothing -> Nothing
+      Just (AST.EntityDec id _) -> Just id
+
 getLibraryUnits ::
   (HsFunction, FuncData)      -- | A function from the session
   -> [AST.LibraryUnit]        -- | The library units it generates
 
 getLibraryUnits (hsfunc, fdata) =
-  case entity fdata of 
+  case funcEntity fdata of 
     Nothing -> []
     Just ent -> case ent_decl ent of
       Nothing -> []
       Just decl -> [AST.LUEntity decl]
+  ++
+  case funcArch fdata of
+    Nothing -> []
+    Just arch -> [AST.LUArch arch]
 
 -- | The VHDL Bit type
 bit_ty :: AST.TypeMark