X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=VHDL.hs;h=2ac2a12aaffb0a74d6303053f97d871eabdd7775;hb=46f93616d6a7ef012c5f07698d56372881196015;hp=6039447a55f5eb57097fa23b4fffc01d7cbee22a;hpb=758998d6ef18ab5124c65518781c358d76d229ab;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git diff --git a/VHDL.hs b/VHDL.hs index 6039447..2ac2a12 100644 --- a/VHDL.hs +++ b/VHDL.hs @@ -254,13 +254,11 @@ mkConcSm :: -- the type works out. mkConcSm (bndr, Cast expr ty) = mkConcSm (bndr, expr) --- For simple a = b assignments, just generate an unconditional signal --- assignment. This should only happen for dataconstructors without arguments. --- TODO: Integrate this with the below code for application (essentially this --- is an application without arguments) +-- Simple a = b assignments are just like applications, but without arguments. +-- We can't just generate an unconditional assignment here, since b might be a +-- top level binding (e.g., a function with no arguments). mkConcSm (bndr, Var v) = do - ty_state <- getA vsType - return $ [mkUncondAssign (Left bndr) ((varToVHDLExpr ty_state) v)] + genApplication (Left bndr) v [] mkConcSm (bndr, app@(CoreSyn.App _ _))= do let (CoreSyn.Var f, args) = CoreSyn.collectArgs app