X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=VHDL.hs;h=15eb4c59330327e7f82fac05e5aa4391c50b1fbe;hb=528eea4600faddffb577c6582a46c9732ab2679d;hp=eb454203ebeda699ebcc9c595f4a6f395dbdfee7;hpb=3f4773d25a4c44a0e4c9503806562a6741da3508;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/VHDL.hs b/VHDL.hs
index eb45420..15eb4c5 100644
--- a/VHDL.hs
+++ b/VHDL.hs
@@ -264,6 +264,11 @@ mkConcSm ::
   (CoreSyn.CoreBndr, CoreSyn.CoreExpr) -- ^ The binding to process
   -> VHDLState [AST.ConcSm] -- ^ The corresponding VHDL component instantiations.
 
+
+-- Ignore Cast expressions, they should not longer have any meaning as long as
+-- the type works out.
+mkConcSm (bndr, Cast expr ty) = mkConcSm (bndr, expr)
+
 mkConcSm (bndr, app@(CoreSyn.App _ _))= do
   let (CoreSyn.Var f, args) = CoreSyn.collectArgs app
   let valargs' = filter isValArg args
@@ -293,9 +298,8 @@ mkConcSm (bndr, app@(CoreSyn.App _ _))= do
         Just (arg_count, builder) ->
           if length valargs == arg_count then
             let
-              sigs = map (bndrToString.varBndr) valargs
-              sigsNames = map (\signal -> (AST.PrimName (AST.NSimple (mkVHDLExtId signal)))) sigs
-              func = builder sigsNames
+              sigs = map (varToVHDLExpr.varBndr) valargs
+              func = builder sigs
               src_wform = AST.Wform [AST.WformElem func Nothing]
               dst_name = AST.NSimple (mkVHDLExtId (bndrToString bndr))
               assign = dst_name AST.:<==: (AST.ConWforms [] src_wform Nothing)
@@ -346,7 +350,7 @@ mkConcSm (bndr, expr@(Case (Var scrut) b ty [alt])) =
 -- first is the default case, if there is any.
 mkConcSm (bndr, (Case (Var scrut) b ty [(_, _, Var false), (con, _, Var true)])) =
   let
-    cond_expr = (varToVHDLExpr scrut) AST.:=: (conToVHDLExpr con)
+    cond_expr = (varToVHDLExpr scrut) AST.:=: (altconToVHDLExpr con)
     true_expr  = (varToVHDLExpr true)
     false_expr  = (varToVHDLExpr false)
   in
@@ -422,13 +426,26 @@ getFieldLabels ty = do
 
 -- Turn a variable reference into a AST expression
 varToVHDLExpr :: Var.Var -> AST.Expr
-varToVHDLExpr var = AST.PrimName $ AST.NSimple $ bndrToVHDLId var
-
--- Turn a constructor into an AST expression. For dataconstructors, this is
--- only the constructor itself, not any arguments it has. Should not be called
--- with a DEFAULT constructor.
-conToVHDLExpr :: CoreSyn.AltCon -> AST.Expr
-conToVHDLExpr (DataAlt dc) = AST.PrimLit lit
+varToVHDLExpr var = 
+  case Id.isDataConWorkId_maybe var of
+    Just dc -> dataconToVHDLExpr dc
+    -- This is a dataconstructor.
+    -- Not a datacon, just another signal. Perhaps we should check for
+    -- local/global here as well?
+    Nothing -> AST.PrimName $ AST.NSimple $ bndrToVHDLId var
+
+-- Turn a alternative constructor into an AST expression. For
+-- dataconstructors, this is only the constructor itself, not any arguments it
+-- has. Should not be called with a DEFAULT constructor.
+altconToVHDLExpr :: CoreSyn.AltCon -> AST.Expr
+altconToVHDLExpr (DataAlt dc) = dataconToVHDLExpr dc
+
+altconToVHDLExpr (LitAlt _) = error "VHDL.conToVHDLExpr Literals not support in case alternatives yet"
+altconToVHDLExpr DEFAULT = error "VHDL.conToVHDLExpr DEFAULT alternative should not occur here!"
+
+-- Turn a datacon (without arguments!) into a VHDL expression.
+dataconToVHDLExpr :: DataCon.DataCon -> AST.Expr
+dataconToVHDLExpr dc = AST.PrimLit lit
   where
     tycon = DataCon.dataConTyCon dc
     tyname = TyCon.tyConName tycon
@@ -437,9 +454,6 @@ conToVHDLExpr (DataAlt dc) = AST.PrimLit lit
       -- TODO: Do something more robust than string matching
       "Bit"      -> case Name.getOccString dcname of "High" -> "'1'"; "Low" -> "'0'"
       "Bool" -> case Name.getOccString dcname of "True" -> "true"; "False" -> "false"
-conToVHDLExpr (LitAlt _) = error "VHDL.conToVHDLExpr Literals not support in case alternatives yet"
-conToVHDLExpr DEFAULT = error "VHDL.conToVHDLExpr DEFAULT alternative should not occur here!"
-
 
 
 {-