X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=VHDL.hs;h=08034192bf6ced1d4e813f094c4be9b3cbf3417c;hb=6e1beb07825c53ab0da16b815d58c24a1b4ea449;hp=67ef0c79dd08327a8938109285e99997f4003d56;hpb=eb685a2f6743bfea37ef304cad0129e16c2809ee;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/VHDL.hs b/VHDL.hs
index 67ef0c7..0803419 100644
--- a/VHDL.hs
+++ b/VHDL.hs
@@ -275,7 +275,7 @@ mkConcSm _ sigs (UncondDef src dst) _ =
       case expr of
         (EqLit id lit) ->
           (mkIdExpr sigs id) AST.:=: (AST.PrimLit lit)
-        (Literal lit) ->
+        (Literal lit _) ->
           AST.PrimLit lit
         (Eq a b) ->
           (mkIdExpr sigs a) AST.:=: (mkIdExpr sigs b)