X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=Translator.hs;h=f875dd6b3ad5bee7876fcd624104940ab1937101;hb=7bb29e6c00a94229f48663afb6e128d24b3ad7f9;hp=9cced3444d452607e3b8d35cc9b3ce631b6ee515;hpb=e73057cb92295256ab62810771da8e723f4a8223;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/Translator.hs b/Translator.hs
index 9cced34..f875dd6 100644
--- a/Translator.hs
+++ b/Translator.hs
@@ -209,7 +209,7 @@ data BuiltIn = BuiltIn String [PortMap] PortMap
 -- | Map a port specification of a builtin function to a VHDL Signal to put in
 --   a VHDLSignalMap
 toVHDLSignalMap :: HsValueMap (String, AST.TypeMark) -> VHDLSignalMap
-toVHDLSignalMap = fmap (\(name, ty) -> (VHDL.mkVHDLId name, ty))
+toVHDLSignalMap = fmap (\(name, ty) -> Just (VHDL.mkVHDLId name, ty))
 
 -- | Translate a concise representation of a builtin function to something
 --   that can be put into FuncMap directly.