X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=Translator.hs;h=d0738d3f9175a8058d3621bdf17479d52ff3b517;hb=a07f47bf0b471c935e3e76e814b2f6ebfb298d35;hp=15349f1bf5e6bf2d3837fe4c5f1d91e8022a3a9a;hpb=d1d3f4434d96bfa0254061043f6c9f92367cfcc1;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/Translator.hs b/Translator.hs
index 15349f1..d0738d3 100644
--- a/Translator.hs
+++ b/Translator.hs
@@ -33,8 +33,10 @@ import qualified ForSyDe.Backend.Ppr
 import Text.PrettyPrint.HughesPJ (render)
 
 import TranslatorTypes
+import HsValueMap
 import Pretty
 import Flatten
+import FlattenTypes
 import qualified VHDL
 
 main = 
@@ -194,7 +196,10 @@ addBuiltIn (BuiltIn name args res) = do
 
 builtin_funcs = 
   [ 
-    BuiltIn "hwxor" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty))
+    BuiltIn "hwxor" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
+    BuiltIn "hwand" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
+    BuiltIn "hwor" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
+    BuiltIn "hwnot" [(Single ("a", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty))
   ]
 
 -- vim: set ts=8 sw=2 sts=2 expandtab: