X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=Translator.hs;h=b7d3e0ef32d681fc2f80562212a79d7960611a54;hb=6fabab8e6243062ab74860ca90bb4b08f564ceff;hp=bb5845b6febe4f5d90185249d9cfcb1ced265d5e;hpb=790cb87bc728be4140ea7cf0d5444cc4cf96d0dc;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/Translator.hs b/Translator.hs
index bb5845b..b7d3e0e 100644
--- a/Translator.hs
+++ b/Translator.hs
@@ -69,9 +69,14 @@ main =
       -- Create entities and architectures for them
       mapM processBind binds
       modFuncs nameFlatFunction
+      modFuncs VHDL.createEntity
+      -- Extract the library units generated from all the functions in the
+      -- session.
+      funcs <- getFuncs
+      let units = concat $ map VHDL.getLibraryUnits funcs
       return $ AST.DesignFile 
         []
-        []
+        units
 
 findBind :: [CoreBind] -> String -> Maybe CoreBind
 findBind binds lookfor =
@@ -181,7 +186,7 @@ nameFlatFunction hsfunc fdata =
     -- Name the signals in all other functions
     Just flatfunc ->
       let s = sigs flatfunc in
-      let s' = map (\(Signal id Nothing) -> Signal id (Just $ "sig_" ++ (show id))) s in
+      let s' = map (\(id, (SignalInfo Nothing)) -> (id, SignalInfo (Just $ "sig_" ++ (show id)))) s in
       let flatfunc' = flatfunc { sigs = s' } in
       fdata { flatFunc = Just flatfunc' }