X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=Translator.hs;h=9cced3444d452607e3b8d35cc9b3ce631b6ee515;hb=e2a1b9504807512be2e613c9e8822658be6fa626;hp=defa8cabe7990b7dc8bc8bf2841a88884edeac99;hpb=8325780f83f31cc3520029912d0797704d058d7e;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/Translator.hs b/Translator.hs
index defa8ca..9cced34 100644
--- a/Translator.hs
+++ b/Translator.hs
@@ -10,6 +10,7 @@ import qualified Maybe
 import qualified Module
 import qualified Control.Monad.State as State
 import Name
+import qualified Data.Map as Map
 import Data.Generics
 import NameEnv ( lookupNameEnv )
 import HscTypes ( cm_binds, cm_types )
@@ -32,8 +33,11 @@ import qualified ForSyDe.Backend.Ppr
 import Text.PrettyPrint.HughesPJ (render)
 
 import TranslatorTypes
+import HsValueMap
 import Pretty
 import Flatten
+import FlattenTypes
+import VHDLTypes
 import qualified VHDL
 
 main = 
@@ -50,10 +54,10 @@ main =
           --core <- GHC.compileToCoreSimplified "Adders.hs"
           core <- GHC.compileToCoreSimplified "Adders.hs"
           --liftIO $ printBinds (cm_binds core)
-          let binds = Maybe.mapMaybe (findBind (cm_binds core)) ["sfull_adder"]
-          liftIO $ printBinds binds
+          let binds = Maybe.mapMaybe (findBind (cm_binds core)) ["dff"]
+          liftIO $ putStr $ prettyShow binds
           -- Turn bind into VHDL
-          let (vhdl, sess) = State.runState (mkVHDL binds) (VHDLSession 0 [])
+          let (vhdl, sess) = State.runState (mkVHDL binds) (VHDLSession core 0 Map.empty)
           liftIO $ putStr $ render $ ForSyDe.Backend.Ppr.ppr vhdl
           liftIO $ ForSyDe.Backend.VHDL.FileIO.writeDesignFile vhdl "../vhdl/vhdl/output.vhdl"
           liftIO $ putStr $ "\n\nFinal session:\n" ++ prettyShow sess ++ "\n\n"
@@ -62,34 +66,13 @@ main =
     -- Turns the given bind into VHDL
     mkVHDL binds = do
       -- Add the builtin functions
-      --mapM (uncurry addFunc) builtin_funcs
+      mapM addBuiltIn builtin_funcs
       -- Create entities and architectures for them
-      mapM flattenBind binds
-      return $ AST.DesignFile 
-        []
-        []
-
-printTarget (Target (TargetFile file (Just x)) obj Nothing) =
-  print $ show file
-
-printBinds [] = putStr "done\n\n"
-printBinds (b:bs) = do
-  printBind b
-  putStr "\n"
-  printBinds bs
-
-printBind (NonRec b expr) = do
-  putStr "NonRec: "
-  printBind' (b, expr)
-
-printBind (Rec binds) = do
-  putStr "Rec: \n"  
-  foldl1 (>>) (map printBind' binds)
-
-printBind' (b, expr) = do
-  putStr $ getOccString b
-  putStr $ showSDoc $ ppr expr
-  putStr "\n"
+      mapM processBind binds
+      modFuncs nameFlatFunction
+      modFuncs VHDL.createEntity
+      modFuncs VHDL.createArchitecture
+      VHDL.getDesignFile
 
 findBind :: [CoreBind] -> String -> Maybe CoreBind
 findBind binds lookfor =
@@ -101,24 +84,34 @@ findBind binds lookfor =
     NonRec var _ -> lookfor == (occNameString $ nameOccName $ getName var)
   ) binds
 
--- | Flattens the given bind and adds it to the session. Then (recursively)
---   finds any functions it uses and does the same with them.
-flattenBind ::
-  CoreBind                        -- The binder to flatten
+-- | Processes the given bind as a top level bind.
+processBind ::
+  CoreBind                        -- The bind to process
   -> VHDLState ()
 
-flattenBind (Rec _) = error "Recursive binders not supported"
-
-flattenBind bind@(NonRec var expr) = do
+processBind  (Rec _) = error "Recursive binders not supported"
+processBind bind@(NonRec var expr) = do
   -- Create the function signature
   let ty = CoreUtils.exprType expr
   let hsfunc = mkHsFunction var ty
-  --hwfunc <- mkHWFunction bind hsfunc
-  -- Add it to the session
-  --addFunc hsfunc hwfunc 
+  flattenBind hsfunc bind
+
+-- | Flattens the given bind into the given signature and adds it to the
+--   session. Then (recursively) finds any functions it uses and does the same
+--   with them.
+flattenBind ::
+  HsFunction                         -- The signature to flatten into
+  -> CoreBind                        -- The bind to flatten
+  -> VHDLState ()
+
+flattenBind _ (Rec _) = error "Recursive binders not supported"
+
+flattenBind hsfunc bind@(NonRec var expr) = do
+  -- Flatten the function
   let flatfunc = flattenFunction hsfunc bind
-  addFunc hsfunc flatfunc
-  let used_hsfuncs = map appFunc (apps flatfunc)
+  addFunc hsfunc
+  setFlatFunc hsfunc flatfunc
+  let used_hsfuncs = map appFunc (flat_apps flatfunc)
   State.mapM resolvFunc used_hsfuncs
   return ()
 
@@ -128,8 +121,24 @@ resolvFunc ::
   HsFunction        -- | The function to look for
   -> VHDLState ()
 
-resolvFunc hsfunc =
-  return ()
+resolvFunc hsfunc = do
+  -- See if the function is already known
+  func <- getFunc hsfunc
+  case func of
+    -- Already known, do nothing
+    Just _ -> do
+      return ()
+    -- New function, resolve it
+    Nothing -> do
+      -- Get the current module
+      core <- getModule
+      -- Find the named function
+      let bind = findBind (cm_binds core) name
+      case bind of
+        Nothing -> error $ "Couldn't find function " ++ name ++ " in current module."
+        Just b  -> flattenBind hsfunc b
+  where
+    name = hsFuncName hsfunc
 
 -- | Translate a top level function declaration to a HsFunction. i.e., which
 --   interface will be provided by this function. This function essentially
@@ -159,6 +168,24 @@ mkHsFunction f ty =
           error $ "Input state type of function " ++ hsname ++ ": " ++ (showSDoc $ ppr state_ty) ++ " does not match output state type: " ++ (showSDoc $ ppr outstate_ty)
       otherwise                -> error $ "Return type of top-level function " ++ hsname ++ " must be a two-tuple containing a state and output ports."
 
+-- | Adds signal names to the given FlatFunction
+nameFlatFunction ::
+  HsFunction
+  -> FuncData
+  -> VHDLState ()
+
+nameFlatFunction hsfunc fdata =
+  let func = flatFunc fdata in
+  case func of
+    -- Skip (builtin) functions without a FlatFunction
+    Nothing -> do return ()
+    -- Name the signals in all other functions
+    Just flatfunc ->
+      let s = flat_sigs flatfunc in
+      let s' = map (\(id, (SignalInfo Nothing use ty)) -> (id, SignalInfo (Just $ "sig_" ++ (show id)) use ty)) s in
+      let flatfunc' = flatfunc { flat_sigs = s' } in
+      setFlatFunc hsfunc flatfunc'
+
 -- | Splits a tuple type into a list of element types, or Nothing if the type
 --   is not a tuple type.
 splitTupleType ::
@@ -174,4 +201,32 @@ splitTupleType ty =
         Nothing
     Nothing -> Nothing
 
+-- | A consise representation of a (set of) ports on a builtin function
+type PortMap = HsValueMap (String, AST.TypeMark)
+-- | A consise representation of a builtin function
+data BuiltIn = BuiltIn String [PortMap] PortMap
+
+-- | Map a port specification of a builtin function to a VHDL Signal to put in
+--   a VHDLSignalMap
+toVHDLSignalMap :: HsValueMap (String, AST.TypeMark) -> VHDLSignalMap
+toVHDLSignalMap = fmap (\(name, ty) -> (VHDL.mkVHDLId name, ty))
+
+-- | Translate a concise representation of a builtin function to something
+--   that can be put into FuncMap directly.
+addBuiltIn :: BuiltIn -> VHDLState ()
+addBuiltIn (BuiltIn name args res) = do
+    addFunc hsfunc
+    setEntity hsfunc entity
+  where
+    hsfunc = HsFunction name (map useAsPort args) (useAsPort res)
+    entity = Entity (VHDL.mkVHDLId name) (map toVHDLSignalMap args) (toVHDLSignalMap res) Nothing
+
+builtin_funcs = 
+  [ 
+    BuiltIn "hwxor" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
+    BuiltIn "hwand" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
+    BuiltIn "hwor" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
+    BuiltIn "hwnot" [(Single ("a", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty))
+  ]
+
 -- vim: set ts=8 sw=2 sts=2 expandtab: