X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=Translator.hs;h=98380606884c24ba953a07216d1bb788d1747d22;hb=1e30fe04f4c285970ad2d5e23930dd935b4214fa;hp=cf2fb966876c5ffd612d00360dfe772a4adf2110;hpb=d704c6a23e75f563d4816a0e01219fa7a3be266c;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/Translator.hs b/Translator.hs
index cf2fb96..9838060 100644
--- a/Translator.hs
+++ b/Translator.hs
@@ -43,9 +43,9 @@ import qualified VHDL
 
 main = do
   -- Load the module
-  core <- loadModule "Adders.hs"
+  core <- loadModule "Alu.hs"
   -- Translate to VHDL
-  vhdl <- moduleToVHDL core ["shifter"]
+  vhdl <- moduleToVHDL core ["salu"]
   -- Write VHDL to file
   writeVHDL vhdl "../vhdl/vhdl/output.vhdl"