X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=Translator.hs;h=6b0cdd1e06c298e4a8261cb707274e1e9bd3ab7d;hb=2ce159d04deb2858b4851477c85ac5de20ac4117;hp=1786332678717097892bd84c7b2ac66c0badefba;hpb=8a17f35807fb35ee4d2a4c35c75e1cf99066f94d;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/Translator.hs b/Translator.hs
index 1786332..6b0cdd1 100644
--- a/Translator.hs
+++ b/Translator.hs
@@ -52,9 +52,6 @@ import FlattenTypes
 import VHDLTypes
 import qualified VHDL
 
-main = do
-  makeVHDL "Adders.hs" "highordtest2" True
-
 makeVHDL :: String -> String -> Bool -> IO ()
 makeVHDL filename name stateful = do
   -- Load the module