X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=Pretty.hs;h=927749493ae7231d4a9bc6e8017ecae9d1a11190;hb=aa23b0116eaf65b01499cd1eba93a92f7c8c36e8;hp=edfe05b41be06c8c74519af88a8752b00f746dc9;hpb=29ee33754fc52a1a46fd44aba98a4dce8c81ce58;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/Pretty.hs b/Pretty.hs
index edfe05b..9277494 100644
--- a/Pretty.hs
+++ b/Pretty.hs
@@ -1,4 +1,4 @@
-module Pretty (prettyShow) where
+module Pretty (prettyShow, pprString, pprStringDebug) where
 
 
 import qualified Data.Map as Map
@@ -9,7 +9,7 @@ import qualified CoreSyn
 import qualified Module
 import qualified HscTypes
 import Text.PrettyPrint.HughesPJClass
-import Outputable ( showSDoc, ppr, Outputable, OutputableBndr)
+import Outputable ( showSDoc, showSDocDebug, ppr, Outputable, OutputableBndr)
 
 import qualified ForSyDe.Backend.Ppr
 import qualified ForSyDe.Backend.VHDL.Ppr
@@ -76,8 +76,8 @@ instance Pretty SigDef where
 instance Pretty SignalExpr where
   pPrint (EqLit id lit) =
     parens $ pPrint id <> text " = " <> text lit
-  pPrint (Literal lit) =
-    text lit
+  pPrint (Literal lit ty) =
+    text "(" <> text (show ty) <> text ") " <> text lit
   pPrint (Eq a b) =
     parens $ pPrint a <> text " = " <> pPrint b
 
@@ -97,15 +97,15 @@ instance Pretty SigUse where
   pPrint SigSubState = text "s"
 
 instance Pretty TranslatorSession where
-  pPrint (VHDLSession mod nameCount funcs) =
+  pPrint (TranslatorSession mod nameCount flatfuncs) =
     text "Module: " $$ nest 15 (text modname)
     $+$ text "NameCount: " $$ nest 15 (int nameCount)
-    $+$ text "Functions: " $$ nest 15 (vcat (map ppfunc (Map.toList funcs)))
+    $+$ text "Functions: " $$ nest 15 (vcat (map ppfunc (Map.toList flatfuncs)))
     where
-      ppfunc (hsfunc, fdata) =
-        pPrint hsfunc $+$ nest 5 (pPrint fdata)
+      ppfunc (hsfunc, flatfunc) =
+        pPrint hsfunc $+$ nest 5 (pPrint flatfunc)
       modname = showSDoc $ Module.pprModule (HscTypes.cm_module mod)
-
+{-
 instance Pretty FuncData where
   pPrint (FuncData flatfunc entity arch) =
     text "Flattened: " $$ nest 15 (ppffunc flatfunc)
@@ -118,19 +118,13 @@ instance Pretty FuncData where
       ppent Nothing    = text "Nothing"
       pparch Nothing = text "VHDL architecture not present"
       pparch (Just _) = text "VHDL architecture present"
+-}
 
 instance Pretty Entity where
-  pPrint (Entity id args res decl pkg) =
+  pPrint (Entity id args res) =
     text "Entity: " $$ nest 10 (pPrint id)
     $+$ text "Args: " $$ nest 10 (pPrint args)
     $+$ text "Result: " $$ nest 10 (pPrint res)
-    $+$ ppdecl decl
-    $+$ pppkg pkg
-    where
-      ppdecl Nothing = text "VHDL entity not present"
-      ppdecl (Just _) = text "VHDL entity present"
-      pppkg Nothing = text "VHDL package not present"
-      pppkg (Just _) = text "VHDL package present"
 
 instance (OutputableBndr b, Show b) => Pretty (CoreSyn.Bind b) where
   pPrint (CoreSyn.NonRec b expr) =
@@ -138,8 +132,14 @@ instance (OutputableBndr b, Show b) => Pretty (CoreSyn.Bind b) where
   pPrint (CoreSyn.Rec binds) =
     text "Rec: " $$ nest 10 (vcat $ map (prettyBind) binds)
 
+instance (OutputableBndr b, Show b) => Pretty (CoreSyn.Expr b) where
+  pPrint = text . show
+
 instance Pretty AST.VHDLId where
   pPrint id = ForSyDe.Backend.Ppr.ppr id
+  
+instance Pretty AST.VHDLName where
+  pPrint name = ForSyDe.Backend.Ppr.ppr name
 
 prettyBind :: (Show b, Show e) => (b, e) -> Doc
 prettyBind (b, expr) =
@@ -147,3 +147,17 @@ prettyBind (b, expr) =
   where
     b' = show b
     expr' = show expr
+
+instance (Pretty k, Pretty v) => Pretty (Map.Map k v) where
+  pPrint = 
+    vcat . map ppentry . Map.toList
+    where
+      ppentry (k, v) =
+        pPrint k <> text " : " $$ nest 15 (pPrint v)
+
+-- Convenience method for turning an Outputable into a string
+pprString :: (Outputable x) => x -> String
+pprString = showSDoc . ppr
+
+pprStringDebug :: (Outputable x) => x -> String
+pprStringDebug = showSDocDebug . ppr