X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=Pretty.hs;h=75c73cc095e422f0b52456d75350853738cdfe18;hb=0de275199ba2f3a98339eefb7784e061a451c5f7;hp=6d495694f8a7fc4dab1fbe14b9378d550f67a8f7;hpb=e1804fc0ff2824e3584383ad7553a8f265ab615b;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/Pretty.hs b/Pretty.hs
index 6d49569..75c73cc 100644
--- a/Pretty.hs
+++ b/Pretty.hs
@@ -1,6 +1,13 @@
+-- Needed for the Show deriving for Core types
+{-# LANGUAGE StandaloneDeriving #-}
+
 module Pretty (prettyShow) where
 
+
 import qualified Data.Map as Map
+import qualified Data.Foldable as Foldable
+import qualified List
+
 import qualified Var
 import qualified CoreSyn
 import qualified TypeRep
@@ -36,26 +43,50 @@ instance Pretty x => Pretty (HsValueMap x) where
 
 instance Pretty HsValueUse where
   pPrint Port            = char 'P'
-  pPrint (State n)       = char 'C' <> int n
+  pPrint (State n)       = char 'S' <> int n
   pPrint (HighOrder _ _) = text "Higher Order"
 
 instance Pretty FlatFunction where
   pPrint (FlatFunction args res defs sigs) =
     (text "Args: ") $$ nest 10 (pPrint args)
     $+$ (text "Result: ") $$ nest 10 (pPrint res)
-    $+$ (text "Defs: ") $$ nest 10 (pPrint defs)
-    $+$ text "Signals: " $$ nest 10 (printList ppsig sigs)
+    $+$ (text "Defs: ") $$ nest 10 (ppdefs defs)
+    $+$ text "Signals: " $$ nest 10 (ppsigs sigs)
     where
       ppsig (id, info) = pPrint id <> pPrint info
+      ppdefs defs = vcat (map pPrint sorted)
+        where 
+          -- Roughly sort the entries (inaccurate for Fapps)
+          sorted = List.sortBy (\a b -> compare (sigDefDst a) (sigDefDst b)) defs
+          sigDefDst (FApp _ _ dst) = head $ Foldable.toList dst
+          sigDefDst (CondDef _ _ _ dst) = dst
+          sigDefDst (UncondDef _ dst) = dst
+      ppsigs sigs = vcat (map pPrint sorted)
+        where
+          sorted = List.sortBy (\a b -> compare (fst a) (fst b)) sigs
+
 
 instance Pretty SigDef where
   pPrint (FApp func args res) =
     pPrint func <> text " : " <> pPrint args <> text " -> " <> pPrint res
-  pPrint (CondDef _ _ _ _) = text "TODO"
-  pPrint (UncondDef src dst) = text "TODO"
+  pPrint (CondDef cond true false res) = 
+    pPrint cond <> text " ? " <> pPrint true <> text " : " <> pPrint false <> text " -> " <> pPrint res
+  pPrint (UncondDef src dst) =
+    ppsrc src <> text " -> " <> pPrint dst
+    where
+      ppsrc (Left id) = pPrint id
+      ppsrc (Right expr) = pPrint expr
+
+instance Pretty SignalExpr where
+  pPrint (EqLit id lit) =
+    parens $ pPrint id <> text " = " <> text lit
+  pPrint (Literal lit) =
+    text lit
+  pPrint (Eq a b) =
+    parens $ pPrint a <> text " = " <> pPrint b
 
 instance Pretty SignalInfo where
-  pPrint (SignalInfo name use ty) =
+  pPrint (SignalInfo name use ty hints) =
     text ":" <> (pPrint use) <> (ppname name)
     where
       ppname Nothing = empty
@@ -93,14 +124,17 @@ instance Pretty FuncData where
       pparch (Just _) = text "VHDL architecture present"
 
 instance Pretty Entity where
-  pPrint (Entity id args res decl) =
+  pPrint (Entity id args res decl pkg) =
     text "Entity: " $$ nest 10 (pPrint id)
     $+$ text "Args: " $$ nest 10 (pPrint args)
     $+$ text "Result: " $$ nest 10 (pPrint res)
     $+$ ppdecl decl
+    $+$ pppkg pkg
     where
       ppdecl Nothing = text "VHDL entity not present"
       ppdecl (Just _) = text "VHDL entity present"
+      pppkg Nothing = text "VHDL package not present"
+      pppkg (Just _) = text "VHDL package present"
 
 instance (OutputableBndr b, Show b) => Pretty (CoreSyn.Bind b) where
   pPrint (CoreSyn.NonRec b expr) =