X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=Pretty.hs;h=6d495694f8a7fc4dab1fbe14b9378d550f67a8f7;hb=e1804fc0ff2824e3584383ad7553a8f265ab615b;hp=7c9840450339be35f57184f950824042fcc41283;hpb=e2a1b9504807512be2e613c9e8822658be6fa626;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/Pretty.hs b/Pretty.hs
index 7c98404..6d49569 100644
--- a/Pretty.hs
+++ b/Pretty.hs
@@ -1,13 +1,16 @@
 module Pretty (prettyShow) where
 
 import qualified Data.Map as Map
+import qualified Var
 import qualified CoreSyn
+import qualified TypeRep
 import qualified Module
 import qualified HscTypes
 import Text.PrettyPrint.HughesPJClass
 import Outputable ( showSDoc, ppr, Outputable, OutputableBndr)
 
 import qualified ForSyDe.Backend.Ppr
+import qualified ForSyDe.Backend.VHDL.Ppr
 import qualified ForSyDe.Backend.VHDL.AST as AST
 
 import HsValueMap
@@ -36,22 +39,20 @@ instance Pretty HsValueUse where
   pPrint (State n)       = char 'C' <> int n
   pPrint (HighOrder _ _) = text "Higher Order"
 
-instance Pretty id => Pretty (FlatFunction' id) where
-  pPrint (FlatFunction args res apps conds sigs) =
+instance Pretty FlatFunction where
+  pPrint (FlatFunction args res defs sigs) =
     (text "Args: ") $$ nest 10 (pPrint args)
     $+$ (text "Result: ") $$ nest 10 (pPrint res)
-    $+$ (text "Apps: ") $$ nest 10 (vcat (map pPrint apps))
-    $+$ (text "Conds: ") $$ nest 10 (pPrint conds)
+    $+$ (text "Defs: ") $$ nest 10 (pPrint defs)
     $+$ text "Signals: " $$ nest 10 (printList ppsig sigs)
     where
       ppsig (id, info) = pPrint id <> pPrint info
 
-instance Pretty id => Pretty (FApp id) where
+instance Pretty SigDef where
   pPrint (FApp func args res) =
     pPrint func <> text " : " <> pPrint args <> text " -> " <> pPrint res
-
-instance Pretty id => Pretty (CondDef id) where
-  pPrint _ = text "TODO"
+  pPrint (CondDef _ _ _ _) = text "TODO"
+  pPrint (UncondDef src dst) = text "TODO"
 
 instance Pretty SignalInfo where
   pPrint (SignalInfo name use ty) =
@@ -101,7 +102,7 @@ instance Pretty Entity where
       ppdecl Nothing = text "VHDL entity not present"
       ppdecl (Just _) = text "VHDL entity present"
 
-instance (OutputableBndr b) => Pretty (CoreSyn.Bind b) where
+instance (OutputableBndr b, Show b) => Pretty (CoreSyn.Bind b) where
   pPrint (CoreSyn.NonRec b expr) =
     text "NonRec: " $$ nest 10 (prettyBind (b, expr))
   pPrint (CoreSyn.Rec binds) =
@@ -110,9 +111,21 @@ instance (OutputableBndr b) => Pretty (CoreSyn.Bind b) where
 instance Pretty AST.VHDLId where
   pPrint id = ForSyDe.Backend.Ppr.ppr id
 
-prettyBind :: (Outputable b, Outputable e) => (b, e) -> Doc
+prettyBind :: (Show b, Show e) => (b, e) -> Doc
 prettyBind (b, expr) =
   text b' <> text " = " <> text expr'
   where
-    b' = showSDoc $ ppr b
-    expr' = showSDoc $ ppr expr
+    b' = show b
+    expr' = show expr
+
+-- Derive Show for core expressions and binders, so we can see the actual
+-- structure.
+deriving instance (Show b) => Show (CoreSyn.Expr b)
+deriving instance (Show b) => Show (CoreSyn.Bind b)
+
+-- Implement dummy shows for Note and Type, so we can at least use show on
+-- expressions.
+instance Show CoreSyn.Note where
+  show n = "<note>"
+instance Show TypeRep.Type where
+  show t = "_type:(" ++ (showSDoc $ ppr t) ++ ")"