X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=PolyAlu.lhs;h=547f0951baa8e27c4f431690603e4470279b653a;hb=bb178ef5c75d6adf38295303902670365634319c;hp=5a4e26a16f6fb5bd28885fa06a642b23e2f4414b;hpb=994fb60ca2fb9a48380e54b4392f7519fcc63ec1;p=matthijs%2Fmaster-project%2Fhaskell-symposium-talk.git

diff --git a/PolyAlu.lhs b/PolyAlu.lhs
index 5a4e26a..547f095 100644
--- a/PolyAlu.lhs
+++ b/PolyAlu.lhs
@@ -12,41 +12,28 @@ import qualified Prelude as P
 \subsection{Introduction}
 \frame
 {
-\frametitle{Small Use Case}
+\frametitle{Small Use Case}\pause
+TODO: Plaatje
 \begin{itemize}
-  \item Small Polymorphic, Higher-Order CPU
-  \item Each function is turned into a hardware component
+  \item Polymorphic, Higher-Order CPU\pause
   \item Use of state will be simple
 \end{itemize}
-}
-
-\frame
-{
-\frametitle{Imports}
-Import all the built-in types, such as vectors and integers:
-\begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox}
-\begin{code}
-import CLasH.HardwareTypes
-\end{code}
-\end{beamercolorbox}\pause
-
-Import annotations, helps \clash{} to find top-level component:
-\begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox}
-\begin{code}
-import CLasH.Translator.Annotations
-\end{code}
-\end{beamercolorbox}
+}\note[itemize]{
+\item Small "toy"-example of what can be done in \clash{}
+\item Show what can be translated to Hardware
+\item Put your hardware glasses on: each function will be a component
+\item Use of state will be kept simple
 }
 
 \subsection{Type Definitions}
 \frame
 {
-\frametitle{Type definitions}
+\frametitle{Type definitions}\pause
+TODO: Plaatje van de ALU
 First we define some ALU types:
 \begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox}
 \begin{code}
-type Op s a         =   a -> Vector s a -> a
-type Opcode         =   Bit
+type Op a         =   a -> a -> a
 \end{code}
 \end{beamercolorbox}\pause
 
@@ -57,102 +44,91 @@ type RegBank s a    =   Vector (s :+: D1) a
 type RegState s a   =   State (RegBank s a)
 \end{code}
 \end{beamercolorbox}\pause
-
-And a simple Word type:
-\begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox}
-\begin{code}
-type Word           =   SizedInt D12
-\end{code}
-\end{beamercolorbox}
+}\note[itemize]{
+\item The first type is already polymorphic in input / output type
+\item State has to be of the State type to be recognized as such
 }
 
-\subsection{Frameworks for Operations}
-\frame
-{
-\frametitle{Operations}
-We make a primitive operation:
-\begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox}
-\begin{code}
-primOp :: {-"{\color<3>[rgb]{1,0,0}"-}(a -> a -> a){-"}"-} -> Op s a
-primOp f a b = a `f` a
-\end{code}
-\end{beamercolorbox}\pause
-
-We make a vector operation:
-\begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox}
-\begin{code}
-vectOp :: {-"{\color<3>[rgb]{1,0,0}"-}(a -> a -> a){-"}"-} -> Op s a
-vectOp f a b = {-"{\color<3>[rgb]{1,0,0}"-}foldl{-"}"-} f a b
-\end{code}
-\end{beamercolorbox}
-\begin{itemize}
-\uncover<3->{\item We support Higher-Order Functionality}
-\end{itemize}
-}
 \subsection{Polymorphic, Higher-Order ALU}
 \frame
 {
 \frametitle{Simple ALU}
-We define a polymorphic ALU:
+Abstract ALU definition:
 \begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox}
 \begin{code}
+type Opcode         =   Bit
 alu :: 
-  Op s a -> 
-  Op s a -> 
-  Opcode -> a -> Vector s a -> a
+  Op a -> Op a -> 
+  Opcode -> a -> a -> a
 alu op1 op2 {-"{\color<2>[rgb]{1,0,0}"-}Low{-"}"-}    a b = op1 a b
 alu op1 op2 {-"{\color<2>[rgb]{1,0,0}"-}High{-"}"-}   a b = op2 a b
 \end{code}
 \end{beamercolorbox}
 \begin{itemize}
-\uncover<2->{\item We support Patter Matching}
+\uncover<2->{\item We support Pattern Matching}
 \end{itemize}
+}\note[itemize]{
+\item Alu is both higher-order, and polymorphic
+\item Two parameters are "compile time", others are "runtime"
+\item We support pattern matching
 }
+
 \subsection{Register bank}
 \frame
 {
 \frametitle{Register Bank}
 Make a simple register bank:
 \begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox}
+TODO: Hide type sig
 \begin{code}
 registerBank :: 
-  CXT((NaturalT s ,PositiveT (s :+: D1),((s :+: D1) :>: s) ~ True )) => (RegState s a) -> a -> RangedWord s ->
-  RangedWord s -> Bit -> ((RegState s a), a )
+  CXT((NaturalT s ,PositiveT (s :+: D1),((s :+: D1) :>: s) ~ True )) => a -> RangedWord s ->
+  RangedWord s -> Bool -> (RegState s a) -> ((RegState s a), a )
   
-registerBank (State mem) data_in rdaddr wraddr wrenable = 
+registerBank data_in rdaddr wraddr (State mem) = 
   ((State mem'), data_out)
   where
-    data_out  =   mem!rdaddr
-    mem'  {-"{\color<2>[rgb]{1,0,0}"-}| wrenable == Low{-"}"-}    = mem
-          {-"{\color<2>[rgb]{1,0,0}"-}| otherwise{-"}"-}          = replace mem wraddr data_in
+    data_out  = mem!rdaddr
+    mem'      = replace mem wraddr data_in
 \end{code}
 \end{beamercolorbox}
 \begin{itemize}
 \uncover<2->{\item We support Guards}
 \end{itemize}
+}\note[itemize]{
+\item RangedWord runs from 0 to the upper bound
+\item mem is statefull
+\item We support guards
+\item replace is a builtin function
 }
+
 \subsection{Simple CPU: ALU \& Register Bank}
 \frame
 {
 \frametitle{Simple CPU}
 Combining ALU and register bank:
 \begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox}
+TODO: Hide Instruction type?
 \begin{code}
+type Instruction = (Opcode, Word, RangedWord D9, RangedWord D9) ->  RegState D9 Word ->
 {-"{\color<2>[rgb]{1,0,0}"-}ANN(actual_cpu TopEntity){-"}"-}
 actual_cpu :: 
-  (Opcode, Word, Vector D4 Word, RangedWord D9, 
-  RangedWord D9, Bit) ->  RegState D9 Word ->
-  (RegState D9 Word, Word)
+  Instruction -> RegState D9 Word -> (RegState D9 Word, Word)
 
-actual_cpu (opc, a ,b, rdaddr, wraddr, wren) ram = (ram', alu_out)
+actual_cpu (opc, d, rdaddr, wraddr) ram = (ram', alu_out)
   where
-    alu_out = alu ({-"{\color<3>[rgb]{1,0,0}"-}primOp (+){-"}"-}) ({-"{\color<3>[rgb]{1,0,0}"-}vectOp (+){-"}"-}) opc ram_out b
-    (ram',ram_out)  = registerBank ram a rdaddr wraddr wren
+    alu_out = alu ({-"{\color<3>[rgb]{1,0,0}"-}(+){-"}"-}) ({-"{\color<3>[rgb]{1,0,0}"-}(-){-"}"-}) opc d ram_out
+    (ram',ram_out)  = registerBank alu_out rdaddr wraddr ram
 \end{code}
 \end{beamercolorbox}
 \begin{itemize}
 \uncover<2->{\item Annotation is used to indicate top-level component}
 \end{itemize}
+}\note[itemize]{
+\item We use the new Annotion functionality to indicate this is the top level. TopEntity is defined by us.
+\item the primOp and vectOp frameworks are now supplied with real functionality, the plus (+) operations
+\item No polymorphism or higher-order stuff is allowed at this level.
+\item Functions must be specialized, and have primitives for input and output 
 }
 
 %if style == newcode
@@ -164,9 +140,9 @@ initstate = State (copy (0 :: Word))
 ANN(program TestInput)
 program :: [(Opcode, Word, Vector D4 Word, RangedWord D9, RangedWord D9, Bit)]
 program =
-  [ (Low, 4, copy (0::Word), 0, 0, High) -- Write 4 to Reg0, out = 0
-  , (Low, 3, copy (0::Word), 0, 1, High) -- Write 3 to Reg1, out = Reg0 + Reg0 = 8
-  , (High,0, copy (3::Word), 1, 0, Low)  -- No Write       , out = 15
+  [ (Low, 4, copy (0), 0, 0, High) -- Write 4 to Reg0, out = 0
+  , (Low, 3, copy (0), 0, 1, High) -- Write 3 to Reg1, out = 8
+  , (High,0, copy (3), 1, 0, Low)  -- No Write       , out = 15
   ]
 
 run func state [] = []
@@ -180,7 +156,7 @@ main = do
   let input = program
   let istate = initstate
   let output = run actual_cpu istate input
-  mapM_ (\x -> putStr $ ("# (" P.++ (show x) P.++ ")\n")) output
+  mapM_ (\x -> putStr $ ("(" P.++ (show x) P.++ ")\n")) output
   return ()
 \end{code}
-%endif
\ No newline at end of file
+%endif