X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=HighOrdAlu.hs;h=1ead210f0bb82dd85ceae098bdd3fb89380b5cf8;hb=cb6549978b8d8d360efcfc7586ca75f4442c2c57;hp=cdef7710c206a817b1bedcfa030bdbfefdd6bfe3;hpb=1643800a4ef64501806747d2cafe917be7b1b3b2;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git diff --git a/HighOrdAlu.hs b/HighOrdAlu.hs index cdef771..1ead210 100644 --- a/HighOrdAlu.hs +++ b/HighOrdAlu.hs @@ -1,3 +1,5 @@ +{-# LANGUAGE TemplateHaskell #-} + module HighOrdAlu where import Prelude hiding ( @@ -7,24 +9,47 @@ import Bits import Types import Data.Param.TFVec import Data.RangedWord +import CLasH.Translator.Annotations constant :: e -> Op D4 e constant e a b = - e +> (e +> (e +> (e +> empty))) - -inv = hwnot + (e +> (e +> (e +> (singleton e)))) invop :: Op n Bit -invop a b = map inv a +invop a b = map hwnot a + +andop :: Op n Bit +andop a b = zipWith hwand a b + +-- Is any bit set? +--anyset :: (PositiveT n) => Op n Bit +anyset :: (Bit -> Bit -> Bit) -> Op D4 Bit +--anyset a b = copy undefined (a' `hwor` b') +anyset f a b = constant (a' `hwor` b') a b + where + a' = foldl f Low a + b' = foldl f Low b + +xhwor = hwor type Op n e = (TFVec n e -> TFVec n e -> TFVec n e) type Opcode = Bit +{-# ANN sim_input TestInput#-} +sim_input = [ (High,$(vectorTH [High,Low,Low,Low]),$(vectorTH [High,Low,Low,Low])) + , (High,$(vectorTH [High,High,High,High]),$(vectorTH [High,High,High,High])) + , (Low,$(vectorTH [High,Low,Low,High]),$(vectorTH [High,Low,High,Low]))] + +{-# ANN actual_alu InitState #-} +initstate = High + alu :: Op n e -> Op n e -> Opcode -> TFVec n e -> TFVec n e -> TFVec n e alu op1 op2 opc a b = case opc of Low -> op1 a b High -> op2 a b -zero_inv_alu :: Opcode -> TFVec D4 Bit -> TFVec D4 Bit -> TFVec D4 Bit -zero_inv_alu = alu (constant Low) invop +{-# ANN actual_alu TopEntity #-} +actual_alu :: (Opcode, TFVec D4 Bit, TFVec D4 Bit) -> TFVec D4 Bit +--actual_alu = alu (constant Low) andop +actual_alu (opc, a, b) = alu (anyset xhwor) (andop) opc a b