X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=Generate.hs;h=23e4a2c7195c6b37cfb8980e174a795c436989cb;hb=d21c34b00b9041a146da89324e9dda6b22271b47;hp=97d94882206ad81701ca39b8e583a6884753326f;hpb=241a1d6f8a4bc9cccc0cacb05e8348fa3e204f74;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git diff --git a/Generate.hs b/Generate.hs index 97d9488..23e4a2c 100644 --- a/Generate.hs +++ b/Generate.hs @@ -3,6 +3,15 @@ module Generate where import qualified ForSyDe.Backend.VHDL.AST as AST import Constants +-- | Generate a binary operator application. The first argument should be a +-- constructor from the AST.Expr type, e.g. AST.And. +genExprOp2 :: (AST.Expr -> AST.Expr -> AST.Expr) -> [AST.Expr] -> AST.Expr +genExprOp2 op [arg1, arg2] = op arg1 arg2 + +-- | Generate a unary operator application +genExprOp1 :: (AST.Expr -> AST.Expr) -> [AST.Expr] -> AST.Expr +genExprOp1 op [arg] = op arg + -- | Generate a function call from the Function Name and a list of expressions -- (its arguments) genExprFCall :: AST.VHDLId -> [AST.Expr] -> AST.Expr @@ -10,28 +19,18 @@ genExprFCall fName args = AST.PrimFCall $ AST.FCall (AST.NSimple fName) $ map (\exp -> Nothing AST.:=>: AST.ADExpr exp) args --- | List version of genExprFCall1 -genExprFCall1L :: AST.VHDLId -> [AST.Expr] -> AST.Expr -genExprFCall1L fName [arg] = genExprFCall fName [arg] -genExprFCall1L _ _ = error "Generate.genExprFCall1L incorrect length" - --- | List version of genExprFCall2 -genExprFCall2L :: AST.VHDLId -> [AST.Expr] -> AST.Expr -genExprFCall2L fName [arg1, arg2] = genExprFCall fName [arg1,arg2] -genExprFCall2L _ _ = error "Generate.genExprFCall2L incorrect length" - genUnconsVectorFuns :: AST.TypeMark -- ^ type of the vector elements -> AST.TypeMark -- ^ type of the vector -> [AST.SubProgBody] genUnconsVectorFuns elemTM vectorTM = [ AST.SubProgBody exSpec [] [exExpr] , AST.SubProgBody replaceSpec [AST.SPVD replaceVar] [replaceExpr,replaceRet] - , AST.SubProgBody headSpec [] [headExpr] - , AST.SubProgBody lastSpec [] [lastExpr] - , AST.SubProgBody initSpec [AST.SPVD initVar] [initExpr, initRet] - , AST.SubProgBody tailSpec [AST.SPVD tailVar] [tailExpr, tailRet] - , AST.SubProgBody takeSpec [AST.SPVD takeVar] [takeExpr, takeRet] - , AST.SubProgBody dropSpec [AST.SPVD dropVar] [dropExpr, dropRet] + , AST.SubProgBody headSpec [] [headExpr] + , AST.SubProgBody lastSpec [] [lastExpr] + , AST.SubProgBody initSpec [AST.SPVD initVar] [initExpr, initRet] + , AST.SubProgBody tailSpec [AST.SPVD tailVar] [tailExpr, tailRet] + , AST.SubProgBody takeSpec [AST.SPVD takeVar] [takeExpr, takeRet] + , AST.SubProgBody dropSpec [AST.SPVD dropVar] [dropExpr, dropRet] ] where ixPar = AST.unsafeVHDLBasicId "ix" @@ -154,4 +153,4 @@ genUnconsVectorFuns elemTM vectorTM = (AST.PrimName (AST.NAttribute $ AST.AttribName (AST.NSimple vecPar) lengthId Nothing) AST.:-: AST.PrimLit "1")) - dropRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId) \ No newline at end of file + dropRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)