X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=Adders.hs;h=7243b504063c0871350745daf98036839078d83b;hb=0dd32af30fee665611e77cfb7bf8fc82f70c970b;hp=03f04101ff9c72612bea6e4ab5030bc8b9fc2eda;hpb=6e25351b49d9e659b19e48c3a142e0f897b49460;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/Adders.hs b/Adders.hs
index 03f0410..7243b50 100644
--- a/Adders.hs
+++ b/Adders.hs
@@ -1,8 +1,14 @@
 module Adders where
 import Bits
+import qualified Sim
 import Language.Haskell.Syntax
 
-main = do show_add exp_adder; show_add rec_adder;
+mainIO f = Sim.simulateIO (Sim.stateless f) ()
+
+-- This function is from Sim.hs, but we redefine it here so it can get inlined
+-- by default.
+stateless :: (i -> o) -> (i -> () -> ((), o))
+stateless f = \i s -> (s, f i)
 
 show_add f = do print ("Sum:   " ++ (displaysigs s)); print ("Carry: " ++ (displaysig c))
   where
@@ -10,6 +16,10 @@ show_add f = do print ("Sum:   " ++ (displaysigs s)); print ("Carry: " ++ (displ
     b = [Low, Low, Low, High]
     (s, c) = f (a, b)
 
+mux2 :: Bit -> (Bit, Bit) -> Bit
+mux2 Low (a, b) = a
+mux2 High (a, b) = b
+
 -- Not really an adder, but this is nice minimal hardware description
 wire :: Bit -> Bit
 wire a = a
@@ -26,6 +36,21 @@ invinv a = hwnot (hwnot a)
 dup :: Bit -> (Bit, Bit)
 dup a = (a, a)
 
+-- Not really an adder either, but a simple stateful example (D-flipflop)
+dff :: Bit -> Bit -> (Bit, Bit)
+dff d s = (s', q)
+  where
+    q = s
+    s' = d
+
+type ShifterState = (Bit, Bit, Bit, Bit)
+shifter :: Bit -> ShifterState -> (ShifterState, Bit)
+shifter a s =
+  (s', o)
+  where
+    s' = (a, b, c, d)
+    (b, c, d, o) = s
+
 -- Combinatoric stateless no-carry adder
 -- A -> B -> S
 no_carry_adder :: (Bit, Bit) -> Bit
@@ -34,6 +59,7 @@ no_carry_adder (a, b) = a `hwxor` b
 -- Combinatoric stateless half adder
 -- A -> B -> (S, C)
 half_adder :: (Bit, Bit) -> (Bit, Bit)
+{-# NOINLINE half_adder #-}
 half_adder (a, b) = 
   ( a `hwxor` b, a `hwand` b )
 
@@ -42,8 +68,11 @@ half_adder (a, b) =
 full_adder :: (Bit, Bit, Bit) -> (Bit, Bit)
 full_adder (a, b, cin) = (s, c)
   where
-    s = a `hwxor` b `hwxor` cin
-    c = a `hwand` b `hwor` (cin `hwand` (a `hwxor` b))
+    (s1, c1) = half_adder(a, b)
+    (s, c2)  = half_adder(s1, cin)
+    c        = c1 `hwor` c2
+
+sfull_adder = stateless full_adder
 
 -- Four bit adder
 -- Explicit version