X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=Adders.hs;h=67d7d95e9fa3a7e3c5d693c2bf1980bb24900155;hb=8d8e5446f4558cd5bfbd78f3378e6cf96a9c3fc8;hp=d4c43ca173450c14892dbfe92b57b478bcf8db63;hpb=91f8a87a34c9b4493bacda77b7df3c95951d3a67;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/Adders.hs b/Adders.hs
index d4c43ca..67d7d95 100644
--- a/Adders.hs
+++ b/Adders.hs
@@ -1,3 +1,5 @@
+{-# LANGUAGE TemplateHaskell #-}
+
 module Adders where
 import Bits
 import qualified Sim
@@ -10,6 +12,7 @@ import Prelude hiding (
 import Language.Haskell.Syntax
 import Types
 import Data.Param.TFVec
+import Data.RangedWord
 
 mainIO f = Sim.simulateIO (Sim.stateless f) ()
 
@@ -171,8 +174,15 @@ highordtest = \x ->
              in
                 \c d -> op' d c
 
-functiontest :: TFVec D4 Bit -> Bit
-functiontest = \v -> let r = head v in r
+xand a b = hwand a b
+
+functiontest :: TFVec D4 Bit -> TFVec D8 Bit
+functiontest = \v -> let r = v ++ $(vectorTH ([High,Low,High,Low] :: [Bit])) in r
+
+xhwnot x = hwnot x
+
+maptest :: TFVec D4 Bit -> TFVec D4 Bit
+maptest = \v -> let r = map xhwnot v in r
 
 highordtest2 = \a b ->
          case a of