X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=Adders.hs;h=6529642f4758ad640b1b93e736ef566e4b1f63eb;hb=b8c1e8554ba8aee73bc9d9a54bb3cb32f7930957;hp=6cf3be5d97ddafff47bd158e4d38a8e7cdaea73d;hpb=91914df9b344ccf0bc3242dc28ce74a8d6721944;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/Adders.hs b/Adders.hs
index 6cf3be5..6529642 100644
--- a/Adders.hs
+++ b/Adders.hs
@@ -1,3 +1,5 @@
+{-# LANGUAGE TemplateHaskell #-}
+
 module Adders where
 import Bits
 import qualified Sim
@@ -11,6 +13,8 @@ import Language.Haskell.Syntax
 import Types
 import Data.Param.TFVec
 import Data.RangedWord
+import Data.SizedInt
+import Data.SizedWord
 
 mainIO f = Sim.simulateIO (Sim.stateless f) ()
 
@@ -172,8 +176,18 @@ highordtest = \x ->
              in
                 \c d -> op' d c
 
-functiontest :: TFVec D4 Bit -> RangedWord D3 -> Bit
-functiontest = \v i -> let r = v!i in r
+xand a b = hwand a b
+
+functiontest :: TFVec D3 (TFVec D4 Bit) -> TFVec D12 Bit
+functiontest = \v -> let r = concat v in r
+
+functiontest2 :: SizedInt D8 -> SizedInt D7
+functiontest2 = \a -> let r = Data.SizedInt.resize a in r
+
+xhwnot x = hwnot x
+
+maptest :: TFVec D4 Bit -> TFVec D4 Bit
+maptest = \v -> let r = map xhwnot v in r
 
 highordtest2 = \a b ->
          case a of