X-Git-Url: https://git.stderr.nl/gitweb?a=blobdiff_plain;f=Adders.hs;h=249bb3a4ef983a84f7f3074f131934688b2974b3;hb=3f12ee5d723fd8c01190c5971641141a8c7a9d98;hp=4745d8cd66b1984ae6e119f2e1e5399f38110ea2;hpb=023e8550e96ed275acf746580642c9f6fee60329;p=matthijs%2Fmaster-project%2Fc%CE%BBash.git

diff --git a/Adders.hs b/Adders.hs
index 4745d8c..249bb3a 100644
--- a/Adders.hs
+++ b/Adders.hs
@@ -2,6 +2,8 @@ module Adders where
 import Bits
 import qualified Sim
 import Language.Haskell.Syntax
+import qualified Data.TypeLevel as TypeLevel
+import qualified Data.Param.FSVec as FSVec
 
 mainIO f = Sim.simulateIO (Sim.stateless f) ()
 
@@ -24,9 +26,34 @@ mux2 High (a, b) = b
 wire :: Bit -> Bit
 wire a = a
 
+bus :: (TypeLevel.Pos len) => BitVec len -> BitVec len
+bus v = v
+
+bus_4 :: BitVec TypeLevel.D4 -> BitVec TypeLevel.D4
+bus_4 v = v
+
+{-
+inv_n :: (Pos len) => BitVec len -> BitVec len
+inv_n v =
+  --FSVec.map hwnot v
+  inv_n_rec v
+
+class Inv vec where
+  inv_n_rec :: vec -> vec
+
+instance (Pos len) => Inv (BitVec len) where
+  inv_n_rec v = 
+    h FSVec.+> t
+    where
+      h = FSVec.head v
+      t = FSVec.tail v
+
+instance Inv (BitVec D0) where
+  inv_n_rec v = v
+-}
 -- Not really an adder either, but a slightly more complex example
 inv :: Bit -> Bit
-inv a = hwnot a
+inv a = let r = hwnot a in r
 
 -- Not really an adder either, but a slightly more complex example
 invinv :: Bit -> Bit
@@ -45,11 +72,31 @@ dff d s = (s', q)
 
 type ShifterState = (Bit, Bit, Bit, Bit)
 shifter :: Bit -> ShifterState -> (ShifterState, Bit)
-shifter a s =
-  (s', o)
+shifter i (a, b, c, d) =
+  (s', d)
+  where
+    s' = (i, a, b, c)
+
+{-# NOINLINE shifter_en #-}
+shifter_en :: Bit -> Bit-> ShifterState -> (ShifterState, Bit)
+shifter_en High i (a, b, c, d) =
+  (s', d)
+  where
+    s' = (i, a, b, c)
+
+shifter_en Low i s@(a, b, c, d) =
+  (s, d)
+
+-- Two multiplexed shifters
+type ShiftersState = (ShifterState, ShifterState)
+shifters :: Bit -> Bit -> ShiftersState -> (ShiftersState, Bit)
+shifters sel i (sa, sb) =
+  (s', out)
   where
-    s' = (a, b, c, d)
-    (b, c, d, o) = s
+    (sa', outa) = shifter_en sel i sa
+    (sb', outb) = shifter_en (hwnot sel) i sb
+    s' = (sa', sb')
+    out = if sel == High then outa else outb
 
 -- Combinatoric stateless no-carry adder
 -- A -> B -> S
@@ -59,6 +106,7 @@ no_carry_adder (a, b) = a `hwxor` b
 -- Combinatoric stateless half adder
 -- A -> B -> (S, C)
 half_adder :: (Bit, Bit) -> (Bit, Bit)
+{-# NOINLINE half_adder #-}
 half_adder (a, b) = 
   ( a `hwxor` b, a `hwand` b )