let enums = [AST.PrimLit "'1'", AST.PrimLit "'0'"]
return (enums, scrut_expr)
(BuiltinType "Bool") -> do
- let enums = [AST.PrimLit "true", AST.PrimLit "false"]
+ let enums = [AST.PrimLit "false", AST.PrimLit "true"]
return (enums, scrut_expr)
_ -> error $ "\nSelector case on weird scrutinee: " ++ pprString scrut ++ " scrutinee type: " ++ pprString (Id.idType scrut)
-- Omit first condition, which is the default. Look up each altcon in
"Unsigned" -> MonadState.lift tsType $ tfp_to_int (sized_word_len_ty ty)
"Index" -> do
bound <- MonadState.lift tsType $ tfp_to_int (ranged_word_bound_ty ty)
- return $ floor (logBase 2 (fromInteger (toInteger (bound)))) + 1
+ return $ (ceiling (logBase 2 (fromInteger (toInteger (bound)))))
let fname = case name of "Signed" -> toSignedId ; "Unsigned" -> toUnsignedId ; "Index" -> toUnsignedId
case args of
[integer] -> do -- The type and dictionary arguments are removed by genApplication
; len <- MonadState.lift tsType $ tfp_to_int $ (tfvec_len_ty . Var.varType) res
; let res_type = (tfvec_elem . Var.varType) res
-- TODO: Use something better than varToString
- ; let { label = mkVHDLExtId ("mapVector" ++ (varToString res))
+ ; let { label = mkVHDLExtId ("mapVector" ++ (varToUniqString res))
; n_id = mkVHDLBasicId "n"
; n_expr = idToVHDLExpr n_id
; range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
; len <- MonadState.lift tsType $ tfp_to_int $ (tfvec_len_ty . Var.varType) res
; let res_type = (tfvec_elem . Var.varType) res
-- TODO: Use something better than varToString
- ; let { label = mkVHDLExtId ("zipWithVector" ++ (varToString res))
+ ; let { label = mkVHDLExtId ("zipWithVector" ++ (varToUniqString res))
; n_id = mkVHDLBasicId "n"
; n_expr = idToVHDLExpr n_id
; range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
Just tmp_vhdl_ty <- MonadState.lift tsType $ vhdlTy error_msg tmp_ty
-- Setup the generate scheme
let gen_label = mkVHDLExtId ("foldlVector" ++ (show vecExpr))
- let block_label = mkVHDLExtId ("foldlVector" ++ (varToString res))
+ let block_label = mkVHDLExtId ("foldlVector" ++ (varToUniqString res))
let gen_range = if left then AST.ToRange (AST.PrimLit "0") len_min_expr
else AST.DownRange len_min_expr (AST.PrimLit "0")
let gen_scheme = AST.ForGn n_id gen_range
; res_htype <- MonadState.lift tsType $ mkHType "\nGenerate.genZip: Invalid result type" (tfvec_elem (Var.varType res))
; [AST.PrimName argName1, AST.PrimName argName2] <- argsToVHDLExprs [arg1,arg2]
-- TODO: Use something better than varToString
- ; let { label = mkVHDLExtId ("zipVector" ++ (varToString res))
+ ; let { label = mkVHDLExtId ("zipVector" ++ (varToUniqString res))
; n_id = mkVHDLBasicId "n"
; n_expr = idToVHDLExpr n_id
; range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
; res_htype <- MonadState.lift tsType $ mkHType "\nGenerate.genUnzip: Invalid result type" (Var.varType res)
; [AST.PrimName arg'] <- argsToVHDLExprs [arg]
-- TODO: Use something better than varToString
- ; let { label = mkVHDLExtId ("unzipVector" ++ (varToString res))
+ ; let { label = mkVHDLExtId ("unzipVector" ++ (varToUniqString res))
; n_id = mkVHDLBasicId "n"
; n_expr = idToVHDLExpr n_id
; range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
; len2 <- MonadState.lift tsType $ tfp_to_int $ tfvec_len_ty nvec
; [AST.PrimName argName] <- argsToVHDLExprs [arg]
-- TODO: Use something better than varToString
- ; let { label = mkVHDLExtId ("concatVector" ++ (varToString res))
+ ; let { label = mkVHDLExtId ("concatVector" ++ (varToUniqString res))
; n_id = mkVHDLBasicId "n"
; n_expr = idToVHDLExpr n_id
; fromRange = n_expr AST.:*: (AST.PrimLit $ show len2)
-- Setup the generate scheme
[startExpr] <- argsToVHDLExprs [start]
let gen_label = mkVHDLExtId ("iterateVector" ++ (show startExpr))
- let block_label = mkVHDLExtId ("iterateVector" ++ (varToString res))
+ let block_label = mkVHDLExtId ("iterateVector" ++ (varToUniqString res))
let gen_range = AST.ToRange (AST.PrimLit "0") len_min_expr
let gen_scheme = AST.ForGn n_id gen_range
-- Make the intermediate vector
let rdaddr_int = genExprFCall (mkVHDLBasicId toIntegerId) $ fst rdaddr
let argexpr = vhdlNameToVHDLExpr $ mkIndexedName (AST.NSimple ram_id) rdaddr_int
let assign = mkUncondAssign (Right resname) argexpr
- let block_label = mkVHDLExtId ("blockRAM" ++ (varToString res))
+ let block_label = mkVHDLExtId ("blockRAM" ++ (varToUniqString res))
let block = AST.BlockSm block_label [] (AST.PMapAspect []) [ram_dec] [assign, mkUpdateProcSm]
return [AST.CSBSm block]
where