Quick hack implementation of FSVec literals, needs to be fixed

[matthijs/master-project/cλash.git] / cλash / CLasH / VHDL / Constants.hs

diff --git a/cλash/CLasH/VHDL/Constants.hs b/cλash/CLasH/VHDL/Constants.hs
index f465d848642c6e8b47e92716ea652af784992f03..d9ed855bf2f63b65ed8c8684147841c3df453ee1 100644 (file)
--- a/cλash/CLasH/VHDL/Constants.hs
+++ b/cλash/CLasH/VHDL/Constants.hs
@@ -16,6 +16,8 @@ resetId, clockId :: AST.VHDLId
 resetId = AST.unsafeVHDLBasicId resetStr
 clockId = AST.unsafeVHDLBasicId clockStr
 
+integerId :: AST.VHDLId
+integerId = AST.unsafeVHDLBasicId "integer"
 
 -- | \"types\" identifier
 typesId :: AST.VHDLId
@@ -261,12 +263,18 @@ toUnsignedId = "to_unsigned"
 resizeId :: String
 resizeId = "resize"
 
+sizedIntId :: String
+sizedIntId = "SizedInt"
+
+tfvecId :: String
+tfvecId = "TFVec"
+
 -- | output file identifier (from std.textio)
 showIdString :: String
 showIdString = "show"
 
 showId :: AST.VHDLId
-showId = AST.unsafeVHDLBasicId showIdString
+showId = AST.unsafeVHDLExtId showIdString
 
 -- | write function identifier (from std.textio)
 writeId :: AST.VHDLId
@@ -311,3 +319,11 @@ signedTM = AST.unsafeVHDLBasicId "signed"
 -- | unsigned TypeMark
 unsignedTM :: AST.TypeMark
 unsignedTM = AST.unsafeVHDLBasicId "unsigned"
+
+-- | string TypeMark
+stringTM :: AST.TypeMark
+stringTM = AST.unsafeVHDLBasicId "string"
+
+-- | tup VHDLName suffix
+tupVHDLSuffix :: AST.VHDLId -> AST.Suffix
+tupVHDLSuffix id = AST.SSimple id
\ No newline at end of file