Add builtin blockRAM primitive

[matthijs/master-project/cλash.git] / cλash / CLasH / VHDL / Constants.hs

diff --git a/cλash/CLasH/VHDL/Constants.hs b/cλash/CLasH/VHDL/Constants.hs
index 50bb9222a4681eba55297c44b67968ddf486f232..71c1c2135b7b1b1d092505279bf91388577d2b5a 100644 (file)
--- a/cλash/CLasH/VHDL/Constants.hs
+++ b/cλash/CLasH/VHDL/Constants.hs
@@ -229,6 +229,25 @@ hwandId = "hwand"
 lengthTId :: String
 lengthTId = "lengthT"
 
+fstId :: String
+fstId = "fst"
+
+sndId :: String
+sndId = "snd"
+
+-- Equality Operations
+equalityId :: String
+equalityId = "=="
+
+inEqualityId :: String
+inEqualityId = "/="
+
+boolOrId :: String
+boolOrId = "||"
+
+boolAndId :: String
+boolAndId = "&&"
+
 -- Numeric Operations
 
 -- | plus operation identifier
@@ -275,6 +294,9 @@ sizedIntId = "SizedInt"
 tfvecId :: String
 tfvecId = "TFVec"
 
+blockRAMId :: String
+blockRAMId = "blockRAM"
+
 -- | output file identifier (from std.textio)
 showIdString :: String
 showIdString = "show"