-- | A specification of an entity we can generate VHDL for. Consists of the
-- binder of the top level entity, an optional initial state and an optional
-- test input.
-type EntitySpec = (CoreSyn.CoreBndr, Maybe CoreSyn.CoreExpr, Maybe CoreSyn.CoreExpr)
+type EntitySpec = (Maybe CoreSyn.CoreBndr, Maybe CoreSyn.CoreExpr, Maybe CoreSyn.CoreExpr)
-- | A function that knows which parts of a module to compile
type Finder =
data HType = StdType OrdType |
ADTType String [HType] |
+ EnumType String [String] |
VecType Int HType |
SizedWType Int |
RangedWType Int |
, tsType_ :: TypeState
, tsBindings_ :: Map.Map CoreSyn.CoreBndr CoreSyn.CoreExpr
, tsNormalized_ :: Map.Map CoreSyn.CoreBndr CoreSyn.CoreExpr
+ , tsEntityCounter_ :: Integer
, tsEntities_ :: Map.Map CoreSyn.CoreBndr Entity
, tsArchitectures_ :: Map.Map CoreSyn.CoreBndr (Architecture, [CoreSyn.CoreBndr])
}