, Bit(..)
, State(..)
, Vector
+ , resizeInt
+ , resizeWord
, hwand
, hwor
, hwxor
import qualified Data.Param.TFVec as TFVec
import Data.Param.TFVec hiding (TFVec)
import Data.RangedWord
-import Data.SizedInt
-import Data.SizedWord
+import qualified Data.SizedInt as SizedInt
+import Data.SizedInt hiding (resize)
+import qualified Data.SizedWord as SizedWord
+import Data.SizedWord hiding (resize)
import Language.Haskell.TH.Lift
import Data.Typeable
type Vector = TFVec.TFVec
+resizeInt :: (NaturalT nT, NaturalT nT') => SizedInt nT -> SizedInt nT'
+resizeInt = SizedInt.resize
+
+resizeWord :: (NaturalT nT, NaturalT nT') => SizedWord nT -> SizedWord nT'
+resizeWord = SizedWord.resize
+
-- The plain Bit type
data Bit = High | Low
deriving (P.Show, P.Eq, P.Read, Typeable)
a ->
RangedWord s ->
RangedWord s ->
- Bit ->
+ Bool ->
((MemState s a), a )
blockRAM (State mem) data_in rdaddr wraddr wrenable =
((State mem'), data_out)
where
data_out = mem!rdaddr
-- Only write data_in to memory if write is enabled
- mem' = case wrenable of
- Low -> mem
- High -> replace mem wraddr data_in
+ mem' = if wrenable then
+ replace mem wraddr data_in
+ else
+ mem