Unify typeprop and funprop into argprop.

[matthijs/master-project/cλash.git] / VHDLTools.hs

diff --git a/VHDLTools.hs b/VHDLTools.hs
index 359597f3395485f1ad96b525da9e4b837cbc14ca..8bc45f79a43490cb3f45c6e0ac3389d58337e085 100644 (file)
--- a/VHDLTools.hs
+++ b/VHDLTools.hs
@@ -479,3 +479,11 @@ mkTyConHType tycon args =
   where
     tyvars = TyCon.tyConTyVars tycon
     subst = CoreSubst.extendTvSubstList CoreSubst.emptySubst (zip tyvars args)
+
+-- Is the given type representable at runtime?
+isReprType :: Type.Type -> TypeSession Bool
+isReprType ty = do
+  ty_either <- vhdl_ty_either ty
+  return $ case ty_either of
+    Left _ -> False
+    Right _ -> True