-- Strip off lambda's, these will be arguments
let (args, letexpr) = CoreSyn.collectBinders expr
-- There must be a let at top level
- let (CoreSyn.Let (CoreSyn.Rec binds) res) = letexpr
+ let (CoreSyn.Let (CoreSyn.Rec binds) (Var res)) = letexpr
- -- Create signal declarations for all internal and state signals
- sig_dec_maybes <- mapM (mkSigDec' . fst) binds
+ -- Create signal declarations for all binders in the let expression, except
+ -- for the output port (that will already have an output port declared in
+ -- the entity).
+ sig_dec_maybes <- mapM (mkSigDec' . fst) (filter ((/=res).fst) binds)
let sig_decs = Maybe.catMaybes $ sig_dec_maybes
- statements <- Monad.mapM mkConcSm binds
+ statementss <- Monad.mapM mkConcSm binds
+ let statements = concat statementss
return $ AST.ArchBody (mkVHDLBasicId "structural") (AST.NSimple entity_id) (map AST.BDISD sig_decs) (statements ++ procs')
where
procs = map mkStateProcSm [] -- (makeStatePairs flatfunc)
-- | Transforms a core binding into a VHDL concurrent statement
mkConcSm ::
(CoreSyn.CoreBndr, CoreSyn.CoreExpr) -- ^ The binding to process
- -> VHDLState AST.ConcSm -- ^ The corresponding VHDL component instantiation.
+ -> VHDLState [AST.ConcSm] -- ^ The corresponding VHDL component instantiations.
mkConcSm (bndr, app@(CoreSyn.App _ _))= do
let (CoreSyn.Var f, args) = CoreSyn.collectArgs app
--let valargs = filter isValArg args in
if all is_var valargs then do
labels <- getFieldLabels (CoreUtils.exprType app)
- let assigns = zipWith mkassign labels valargs
- let block_id = bndrToVHDLId bndr
- let block = AST.BlockSm block_id [] (AST.PMapAspect []) [] assigns
- return $ AST.CSBSm block
+ return $ zipWith mkassign labels valargs
else
error $ "VHDL.mkConcSm Not in normal form: One ore more complex arguments: " ++ pprString args
where
-- It's a global value imported from elsewhere. These can be builtin
-- functions.
funSignatures <- getA vsNameTable
+ entSignatures <- getA vsSignatures
case (Map.lookup (bndrToString f) funSignatures) of
Just (arg_count, builder) ->
if length valargs == arg_count then
- let
- sigs = map (bndrToString.varBndr) valargs
- sigsNames = map (\signal -> (AST.PrimName (AST.NSimple (mkVHDLExtId signal)))) sigs
- func = builder sigsNames
- src_wform = AST.Wform [AST.WformElem func Nothing]
- dst_name = AST.NSimple (mkVHDLExtId (bndrToString bndr))
- assign = dst_name AST.:<==: (AST.ConWforms [] src_wform Nothing)
- in
- return $ AST.CSSASm assign
+ case builder of
+ Left funBuilder ->
+ let
+ sigs = map (bndrToString.varBndr) valargs
+ sigsNames = map (\signal -> (AST.PrimName (AST.NSimple (mkVHDLExtId signal)))) sigs
+ func = funBuilder sigsNames
+ src_wform = AST.Wform [AST.WformElem func Nothing]
+ dst_name = AST.NSimple (mkVHDLExtId (bndrToString bndr))
+ assign = dst_name AST.:<==: (AST.ConWforms [] src_wform Nothing)
+ in
+ return [AST.CSSASm assign]
+ Right genBuilder ->
+ let
+ sigs = map (varBndr) valargs
+ signature = Maybe.fromMaybe
+ (error $ "Using function '" ++ (bndrToString (head sigs)) ++ "' without signature? This should not happen!")
+ (Map.lookup (head sigs) entSignatures)
+ arg_name = mkVHDLExtId (bndrToString (last sigs))
+ dst_name = mkVHDLExtId (bndrToString bndr)
+ genSm = genBuilder 4 signature [arg_name, dst_name]
+ in return [AST.CSGSm genSm]
else
error $ "VHDL.mkConcSm Incorrect number of arguments to builtin function: " ++ pprString f ++ " Args: " ++ pprString valargs
Nothing -> error $ "Using function from another module that is not a known builtin: " ++ pprString f
(error $ "Using function '" ++ (bndrToString f) ++ "' without signature? This should not happen!")
(Map.lookup f signatures)
entity_id = ent_id signature
- label = bndrToString bndr
+ label = "comp_ins_" ++ bndrToString bndr
-- Add a clk port if we have state
--clk_port = Maybe.fromJust $ mkAssocElem (Just $ mkVHDLExtId "clk") "clk"
+ clk_port = Maybe.fromJust $ mkAssocElem (Just $ mkVHDLExtId "clk") "clk"
--portmaps = mkAssocElems sigs args res signature ++ (if hasState hsfunc then [clk_port] else [])
- portmaps = mkAssocElems args bndr signature
+ portmaps = clk_port : mkAssocElems args bndr signature
in
- return $ AST.CSISm $ AST.CompInsSm (mkVHDLExtId label) (AST.IUEntity (AST.NSimple entity_id)) (AST.PMapAspect portmaps)
+ return [AST.CSISm $ AST.CompInsSm (mkVHDLExtId label) (AST.IUEntity (AST.NSimple entity_id)) (AST.PMapAspect portmaps)]
details -> error $ "Calling unsupported function " ++ pprString f ++ " with GlobalIdDetails " ++ pprString details
--- GHC generates some funny "r = r" bindings in let statements before
--- simplification. This outputs some dummy ConcSM for these, so things will at
--- least compile for now.
-mkConcSm (bndr, CoreSyn.Var _) = return $ AST.CSPSm $ AST.ProcSm (mkVHDLBasicId "unused") [] []
-
-- A single alt case must be a selector. This means thee scrutinee is a simple
-- variable, the alternative is a dataalt with a single non-wild binder that
-- is also returned.
let label = labels!!i
let sel_name = mkSelectedName scrut label
let sel_expr = AST.PrimName sel_name
- return $ mkUncondAssign (Left bndr) sel_expr
+ return [mkUncondAssign (Left bndr) sel_expr]
Nothing -> error $ "VHDL.mkConcSM Not in normal form: Not a selector case:\n" ++ (pprString expr)
_ -> error $ "VHDL.mkConcSM Not in normal form: Not a selector case:\n" ++ (pprString expr)
true_expr = (varToVHDLExpr true)
false_expr = (varToVHDLExpr false)
in
- return $ mkCondAssign (Left bndr) cond_expr true_expr false_expr
+ return [mkCondAssign (Left bndr) cond_expr true_expr false_expr]
mkConcSm (_, (Case (Var _) _ _ alts)) = error "VHDL.mkConcSm Not in normal form: Case statement with more than two alternatives"
mkConcSm (_, Case _ _ _ _) = error "VHDL.mkConcSm Not in normal form: Case statement has does not have a simple variable as scrutinee"
mkConcSm (bndr, expr) = error $ "VHDL.mkConcSM Unsupported binding in let expression: " ++ pprString bndr ++ " = " ++ pprString expr
projects / matthijs / master-project / cλash.git / blobdiff