-module Main(main) where
+module Translator where
import GHC
import CoreSyn
import qualified CoreUtils
import qualified TyCon
import qualified DataCon
import qualified Maybe
+import qualified Module
+import qualified Control.Monad.State as State
import Name
+import qualified Data.Map as Map
import Data.Generics
import NameEnv ( lookupNameEnv )
import HscTypes ( cm_binds, cm_types )
import GHC.Paths ( libdir )
import DynFlags ( defaultDynFlags )
import List ( find )
+import qualified List
+import qualified Monad
+
+-- The following modules come from the ForSyDe project. They are really
+-- internal modules, so ForSyDe.cabal has to be modified prior to installing
+-- ForSyDe to get access to these modules.
+import qualified ForSyDe.Backend.VHDL.AST as AST
+import qualified ForSyDe.Backend.VHDL.Ppr
+import qualified ForSyDe.Backend.VHDL.FileIO
+import qualified ForSyDe.Backend.Ppr
+-- This is needed for rendering the pretty printed VHDL
+import Text.PrettyPrint.HughesPJ (render)
+
+import TranslatorTypes
+import HsValueMap
+import Pretty
+import Flatten
+import FlattenTypes
+import qualified VHDL
main =
- do
- defaultErrorHandler defaultDynFlags $ do
- runGhc (Just libdir) $ do
- dflags <- getSessionDynFlags
- setSessionDynFlags dflags
- --target <- guessTarget "adder.hs" Nothing
- --liftIO (print (showSDoc (ppr (target))))
- --liftIO $ printTarget target
- --setTargets [target]
- --load LoadAllTargets
- --core <- GHC.compileToCoreSimplified "Adders.hs"
- core <- GHC.compileToCoreSimplified "Adders.hs"
- liftIO $ printBinds (cm_binds core)
- let bind = findBind "no_carry_adder" (cm_binds core)
- let NonRec var expr = bind
- liftIO $ putStr $ showSDoc $ ppr expr
- liftIO $ putStr "\n\n"
- liftIO $ putStr $ getEntity bind
- liftIO $ putStr $ getArchitecture bind
- return expr
-
-printTarget (Target (TargetFile file (Just x)) obj Nothing) =
- print $ show file
-
-printBinds [] = putStr "done\n\n"
-printBinds (b:bs) = do
- printBind b
- putStr "\n"
- printBinds bs
-
-printBind (NonRec b expr) = do
- putStr "NonRec: "
- printBind' (b, expr)
-
-printBind (Rec binds) = do
- putStr "Rec: \n"
- foldl1 (>>) (map printBind' binds)
-
-printBind' (b, expr) = do
- putStr $ getOccString b
- --putStr $ showSDoc $ ppr expr
- putStr "\n"
-
-findBind :: String -> [CoreBind] -> CoreBind
-findBind lookfor =
- -- This ignores Recs and compares the name of the bind with lookfor,
- -- disregarding any namespaces in OccName and extra attributes in Name and
- -- Var.
- Maybe.fromJust . find (\b -> case b of
- Rec l -> False
- NonRec var _ -> lookfor == (occNameString $ nameOccName $ getName var)
- )
-
--- Generate a port (or multiple for tuple types) in the given direction for
--- each type given.
-getPortsForTys :: String -> String -> Int -> [Type] -> String
-getPortsForTys dir prefix num [] = ""
-getPortsForTys dir prefix num (t:ts) =
- (getPortsForTy dir (prefix ++ show num) t) ++ getPortsForTys dir prefix (num + 1) ts
-
-getPortsForFunTy ty =
- -- All of a function's arguments become IN ports, the result becomes on
- -- (or more) OUT ports.
- -- Drop the first ;\n
- drop 2 (getPortsForTys "in" "portin" 0 args) ++ (getPortsForTy "out" "portout" res) ++ "\n"
- where
- (args, res) = Type.splitFunTys ty
-
-getPortsForTy :: String -> String -> Type -> String
-getPortsForTy dir name ty =
- if (TyCon.isTupleTyCon tycon) then
- -- Expand tuples we find
- getPortsForTys dir name 0 args
- else -- Assume it's a type constructor application, ie simple data type
- let
- vhdlTy = showSDoc $ ppr $ TyCon.tyConName tycon;
- in
- ";\n\t" ++ name ++ " : " ++ dir ++ " " ++ vhdlTy
- where
- (tycon, args) = Type.splitTyConApp ty
-
-getEntity (NonRec var expr) =
- "entity " ++ name ++ " is\n"
- ++ "port (\n"
- ++ getPortsForFunTy ty
- ++ ");\n"
- ++ "end " ++ name ++ ";\n\n"
- where
- name = (getOccString var)
- ty = CoreUtils.exprType expr
-
--- Accepts a port name and an argument to map to it.
--- Returns the appropriate line for in the port map
-getPortMapEntry binds portname (Var id) =
- "\t" ++ portname ++ " => " ++ signalname ++ "\n"
- where
- Port signalname = Maybe.fromMaybe
- (error $ "Argument " ++ getOccString id ++ "is unknown")
- (lookup id binds)
-
-getPortMapEntry binds _ a = error $ "Unsupported argument: " ++ (showSDoc $ ppr a)
-
-getInstantiations ::
- PortNameMap -- The arguments that need to be applied to the
- -- expression. Should always be the Args
- -- constructor.
- -> PortNameMap -- The output ports that the expression should generate.
- -> [(CoreBndr, PortNameMap)] -- A list of bindings in effect
- -> CoreSyn.CoreExpr -- The expression to generate an architecture for
- -> String -- The resulting VHDL code
-
--- A lambda expression binds the first argument (a) to the binder b.
-getInstantiations (Args (a:as)) outs binds (Lam b expr) =
- getInstantiations (Args as) outs ((b, a):binds) expr
-
--- A case expression that checks a single variable and has a single
--- alternative, can be used to take tuples apart
-getInstantiations args outs binds (Case (Var v) b _ [res]) =
- case altcon of
- DataAlt datacon ->
- if (DataCon.isTupleCon datacon) then
- getInstantiations args outs binds' expr
- else
- error "Data constructors other than tuples not supported"
- otherwise ->
- error "Case binders other than tuples not supported"
- where
- binds' = (zip bind_vars tuple_ports) ++ binds
- (altcon, bind_vars, expr) = res
- -- Find the portnamemaps for each of the tuple's elements
- Tuple tuple_ports = Maybe.fromMaybe
- (error $ "Case expression uses unknown scrutinee " ++ getOccString v)
- (lookup v binds)
-
--- An application is an instantiation of a component
-getInstantiations args outs binds app@(App expr arg) =
- --indent ++ "F:\n" ++ (getInstantiations (' ':indent) expr) ++ "\n" ++ indent ++ "A:\n" ++ (getInstantiations (' ':indent) arg) ++ "\n"
- "app : " ++ (getOccString f) ++ "\n"
- ++ "port map (\n"
- -- Map input ports of f
- ++ concat (zipWith (getPortMapEntry binds) ["portin0", "portin1"] args)
- -- Map output ports of f
- ++ mapOutputPorts (Port "portout") outs
- ++ ");\n"
- where
- ((Var f), args) = collectArgs app
-
-getInstantiations args outs binds expr = showSDoc $ ppr $ expr
-
--- Map the output port of a component to the output port of the containing
--- entity.
-mapOutputPorts (Port port) (Port signal) =
- "\t" ++ port ++ " => " ++ signal ++ "\n"
-
--- Map matching output ports in the tuple
-mapOutputPorts (Tuple ports) (Tuple signals) =
- concat (zipWith mapOutputPorts ports signals)
-
-getArchitecture (NonRec var expr) =
- "architecture structural of " ++ name ++ " is\n"
- ++ "begin\n"
- ++ getInstantiations (Args inportnames) outport [] expr
- ++ "end structural\n"
- where
- name = (getOccString var)
- ty = CoreUtils.exprType expr
- (fargs, res) = Type.splitFunTys ty
- --state = if length fargs == 1 then () else (last fargs)
- ports = if length fargs == 1 then fargs else (init fargs)
- inportnames = case ports of
- [port] -> [getPortNameMapForTy "portin" port]
- ps -> getPortNameMapForTys "portin" 0 ps
- outport = getPortNameMapForTy "portout" res
-
-data PortNameMap =
- Args [PortNameMap] -- Each of the submaps represent an argument to the
- -- function. Should only occur at top level.
- | Tuple [PortNameMap]
- | Port String
-
--- Generate a port name map (or multiple for tuple types) in the given direction for
--- each type given.
-getPortNameMapForTys :: String -> Int -> [Type] -> [PortNameMap]
-getPortNameMapForTys prefix num [] = []
-getPortNameMapForTys prefix num (t:ts) =
- (getPortNameMapForTy (prefix ++ show num) t) : getPortNameMapForTys prefix (num + 1) ts
-
-getPortNameMapForTy :: String -> Type -> PortNameMap
-getPortNameMapForTy name ty =
- if (TyCon.isTupleTyCon tycon) then
- -- Expand tuples we find
- Tuple (getPortNameMapForTys name 0 args)
- else -- Assume it's a type constructor application, ie simple data type
- -- TODO: Add type?
- Port name
- where
- (tycon, args) = Type.splitTyConApp ty
+ do
+ defaultErrorHandler defaultDynFlags $ do
+ runGhc (Just libdir) $ do
+ dflags <- getSessionDynFlags
+ setSessionDynFlags dflags
+ --target <- guessTarget "adder.hs" Nothing
+ --liftIO (print (showSDoc (ppr (target))))
+ --liftIO $ printTarget target
+ --setTargets [target]
+ --load LoadAllTargets
+ --core <- GHC.compileToCoreSimplified "Adders.hs"
+ core <- GHC.compileToCoreSimplified "Adders.hs"
+ --liftIO $ printBinds (cm_binds core)
+ let binds = Maybe.mapMaybe (findBind (cm_binds core)) ["sfull_adder"]
+ liftIO $ putStr $ prettyShow binds
+ -- Turn bind into VHDL
+ let (vhdl, sess) = State.runState (mkVHDL binds) (VHDLSession core 0 Map.empty)
+ liftIO $ putStr $ render $ ForSyDe.Backend.Ppr.ppr vhdl
+ liftIO $ ForSyDe.Backend.VHDL.FileIO.writeDesignFile vhdl "../vhdl/vhdl/output.vhdl"
+ liftIO $ putStr $ "\n\nFinal session:\n" ++ prettyShow sess ++ "\n\n"
+ return ()
+ where
+ -- Turns the given bind into VHDL
+ mkVHDL binds = do
+ -- Add the builtin functions
+ mapM addBuiltIn builtin_funcs
+ -- Create entities and architectures for them
+ mapM processBind binds
+ return $ AST.DesignFile
+ []
+ []
+
+findBind :: [CoreBind] -> String -> Maybe CoreBind
+findBind binds lookfor =
+ -- This ignores Recs and compares the name of the bind with lookfor,
+ -- disregarding any namespaces in OccName and extra attributes in Name and
+ -- Var.
+ find (\b -> case b of
+ Rec l -> False
+ NonRec var _ -> lookfor == (occNameString $ nameOccName $ getName var)
+ ) binds
+
+-- | Processes the given bind as a top level bind.
+processBind ::
+ CoreBind -- The bind to process
+ -> VHDLState ()
+
+processBind (Rec _) = error "Recursive binders not supported"
+processBind bind@(NonRec var expr) = do
+ -- Create the function signature
+ let ty = CoreUtils.exprType expr
+ let hsfunc = mkHsFunction var ty
+ flattenBind hsfunc bind
+
+-- | Flattens the given bind into the given signature and adds it to the
+-- session. Then (recursively) finds any functions it uses and does the same
+-- with them.
+flattenBind ::
+ HsFunction -- The signature to flatten into
+ -> CoreBind -- The bind to flatten
+ -> VHDLState ()
+
+flattenBind _ (Rec _) = error "Recursive binders not supported"
+
+flattenBind hsfunc bind@(NonRec var expr) = do
+ -- Flatten the function
+ let flatfunc = flattenFunction hsfunc bind
+ addFunc hsfunc
+ setFlatFunc hsfunc flatfunc
+ let used_hsfuncs = map appFunc (apps flatfunc)
+ State.mapM resolvFunc used_hsfuncs
+ return ()
+
+-- | Find the given function, flatten it and add it to the session. Then
+-- (recursively) do the same for any functions used.
+resolvFunc ::
+ HsFunction -- | The function to look for
+ -> VHDLState ()
+
+resolvFunc hsfunc = do
+ -- See if the function is already known
+ func <- getFunc hsfunc
+ case func of
+ -- Already known, do nothing
+ Just _ -> do
+ return ()
+ -- New function, resolve it
+ Nothing -> do
+ -- Get the current module
+ core <- getModule
+ -- Find the named function
+ let bind = findBind (cm_binds core) name
+ case bind of
+ Nothing -> error $ "Couldn't find function " ++ name ++ " in current module."
+ Just b -> flattenBind hsfunc b
+ where
+ name = hsFuncName hsfunc
+
+-- | Translate a top level function declaration to a HsFunction. i.e., which
+-- interface will be provided by this function. This function essentially
+-- defines the "calling convention" for hardware models.
+mkHsFunction ::
+ Var.Var -- ^ The function defined
+ -> Type -- ^ The function type (including arguments!)
+ -> HsFunction -- ^ The resulting HsFunction
+
+mkHsFunction f ty =
+ HsFunction hsname hsargs hsres
+ where
+ hsname = getOccString f
+ (arg_tys, res_ty) = Type.splitFunTys ty
+ -- The last argument must be state
+ state_ty = last arg_tys
+ state = useAsState (mkHsValueMap state_ty)
+ -- All but the last argument are inports
+ inports = map (useAsPort . mkHsValueMap)(init arg_tys)
+ hsargs = inports ++ [state]
+ hsres = case splitTupleType res_ty of
+ -- Result type must be a two tuple (state, ports)
+ Just [outstate_ty, outport_ty] -> if Type.coreEqType state_ty outstate_ty
+ then
+ Tuple [state, useAsPort (mkHsValueMap outport_ty)]
+ else
+ error $ "Input state type of function " ++ hsname ++ ": " ++ (showSDoc $ ppr state_ty) ++ " does not match output state type: " ++ (showSDoc $ ppr outstate_ty)
+ otherwise -> error $ "Return type of top-level function " ++ hsname ++ " must be a two-tuple containing a state and output ports."
+
+-- | Splits a tuple type into a list of element types, or Nothing if the type
+-- is not a tuple type.
+splitTupleType ::
+ Type -- ^ The type to split
+ -> Maybe [Type] -- ^ The tuples element types
+
+splitTupleType ty =
+ case Type.splitTyConApp_maybe ty of
+ Just (tycon, args) -> if TyCon.isTupleTyCon tycon
+ then
+ Just args
+ else
+ Nothing
+ Nothing -> Nothing
+
+-- | A consise representation of a (set of) ports on a builtin function
+type PortMap = HsValueMap (String, AST.TypeMark)
+-- | A consise representation of a builtin function
+data BuiltIn = BuiltIn String [PortMap] PortMap
+
+-- | Translate a concise representation of a builtin function to something
+-- that can be put into FuncMap directly.
+addBuiltIn :: BuiltIn -> VHDLState ()
+addBuiltIn (BuiltIn name args res) = do
+ addFunc hsfunc
+ where
+ hsfunc = HsFunction name (map useAsPort args) (useAsPort res)
+
+builtin_funcs =
+ [
+ BuiltIn "hwxor" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
+ BuiltIn "hwand" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
+ BuiltIn "hwor" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
+ BuiltIn "hwnot" [(Single ("a", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty))
+ ]
+
+-- vim: set ts=8 sw=2 sts=2 expandtab:
projects / matthijs / master-project / cλash.git / blobdiff