Store a use for each signal in a flattened function.

[matthijs/master-project/cλash.git] / Translator.hs

diff --git a/Translator.hs b/Translator.hs
index 88f321eaf10e127f3cc20344f8363df96f7456b1..9ce7206c9df9bd841bd0c5a4e7cccabe1d392b3f 100644 (file)
--- a/Translator.hs
+++ b/Translator.hs
@@ -37,6 +37,7 @@ import HsValueMap
 import Pretty
 import Flatten
 import FlattenTypes
+import VHDLTypes
 import qualified VHDL
 
 main = 
@@ -177,19 +178,19 @@ mkHsFunction f ty =
 nameFlatFunction ::
   HsFunction
   -> FuncData
-  -> FuncData
+  -> VHDLState ()
 
 nameFlatFunction hsfunc fdata =
   let func = flatFunc fdata in
   case func of
     -- Skip (builtin) functions without a FlatFunction
-    Nothing -> fdata
+    Nothing -> do return ()
     -- Name the signals in all other functions
     Just flatfunc ->
       let s = flat_sigs flatfunc in
-      let s' = map (\(id, (SignalInfo Nothing ty)) -> (id, SignalInfo (Just $ "sig_" ++ (show id)) ty)) s in
+      let s' = map (\(id, (SignalInfo Nothing use ty)) -> (id, SignalInfo (Just $ "sig_" ++ (show id)) use ty)) s in
       let flatfunc' = flatfunc { flat_sigs = s' } in
-      fdata { flatFunc = Just flatfunc' }
+      setFlatFunc hsfunc flatfunc'
 
 -- | Splits a tuple type into a list of element types, or Nothing if the type
 --   is not a tuple type.
@@ -211,13 +212,20 @@ type PortMap = HsValueMap (String, AST.TypeMark)
 -- | A consise representation of a builtin function
 data BuiltIn = BuiltIn String [PortMap] PortMap
 
+-- | Map a port specification of a builtin function to a VHDL Signal to put in
+--   a VHDLSignalMap
+toVHDLSignalMap :: HsValueMap (String, AST.TypeMark) -> VHDLSignalMap
+toVHDLSignalMap = fmap (\(name, ty) -> (VHDL.mkVHDLId name, ty))
+
 -- | Translate a concise representation of a builtin function to something
 --   that can be put into FuncMap directly.
 addBuiltIn :: BuiltIn -> VHDLState ()
 addBuiltIn (BuiltIn name args res) = do
     addFunc hsfunc
+    setEntity hsfunc entity
   where
     hsfunc = HsFunction name (map useAsPort args) (useAsPort res)
+    entity = Entity (VHDL.mkVHDLId name) (map toVHDLSignalMap args) (toVHDLSignalMap res) Nothing
 
 builtin_funcs = 
   [