Store a use for each signal in a flattened function.

[matthijs/master-project/cλash.git] / Translator.hs

diff --git a/Translator.hs b/Translator.hs
index 142a8349dd8364021a8fd5d5c971b6123c91bd98..9ce7206c9df9bd841bd0c5a4e7cccabe1d392b3f 100644 (file)
--- a/Translator.hs
+++ b/Translator.hs
@@ -33,8 +33,11 @@ import qualified ForSyDe.Backend.Ppr
 import Text.PrettyPrint.HughesPJ (render)
 
 import TranslatorTypes
+import HsValueMap
 import Pretty
 import Flatten
+import FlattenTypes
+import VHDLTypes
 import qualified VHDL
 
 main = 
@@ -63,12 +66,19 @@ main =
     -- Turns the given bind into VHDL
     mkVHDL binds = do
       -- Add the builtin functions
-      --mapM (uncurry addFunc) builtin_funcs
+      mapM addBuiltIn builtin_funcs
       -- Create entities and architectures for them
-      mapM flattenBind binds
+      mapM processBind binds
+      modFuncs nameFlatFunction
+      modFuncs VHDL.createEntity
+      modFuncs VHDL.createArchitecture
+      -- Extract the library units generated from all the functions in the
+      -- session.
+      funcs <- getFuncs
+      let units = concat $ map VHDL.getLibraryUnits funcs
       return $ AST.DesignFile 
         []
-        []
+        units
 
 findBind :: [CoreBind] -> String -> Maybe CoreBind
 findBind binds lookfor =
@@ -80,25 +90,34 @@ findBind binds lookfor =
     NonRec var _ -> lookfor == (occNameString $ nameOccName $ getName var)
   ) binds
 
--- | Flattens the given bind and adds it to the session. Then (recursively)
---   finds any functions it uses and does the same with them.
-flattenBind ::
-  CoreBind                        -- The binder to flatten
+-- | Processes the given bind as a top level bind.
+processBind ::
+  CoreBind                        -- The bind to process
   -> VHDLState ()
 
-flattenBind (Rec _) = error "Recursive binders not supported"
-
-flattenBind bind@(NonRec var expr) = do
+processBind  (Rec _) = error "Recursive binders not supported"
+processBind bind@(NonRec var expr) = do
   -- Create the function signature
   let ty = CoreUtils.exprType expr
   let hsfunc = mkHsFunction var ty
-  --hwfunc <- mkHWFunction bind hsfunc
-  -- Add it to the session
-  --addFunc hsfunc hwfunc 
+  flattenBind hsfunc bind
+
+-- | Flattens the given bind into the given signature and adds it to the
+--   session. Then (recursively) finds any functions it uses and does the same
+--   with them.
+flattenBind ::
+  HsFunction                         -- The signature to flatten into
+  -> CoreBind                        -- The bind to flatten
+  -> VHDLState ()
+
+flattenBind _ (Rec _) = error "Recursive binders not supported"
+
+flattenBind hsfunc bind@(NonRec var expr) = do
+  -- Flatten the function
   let flatfunc = flattenFunction hsfunc bind
   addFunc hsfunc
   setFlatFunc hsfunc flatfunc
-  let used_hsfuncs = map appFunc (apps flatfunc)
+  let used_hsfuncs = map appFunc (flat_apps flatfunc)
   State.mapM resolvFunc used_hsfuncs
   return ()
 
@@ -123,7 +142,7 @@ resolvFunc hsfunc = do
       let bind = findBind (cm_binds core) name
       case bind of
         Nothing -> error $ "Couldn't find function " ++ name ++ " in current module."
-        Just b  -> flattenBind b
+        Just b  -> flattenBind hsfunc b
   where
     name = hsFuncName hsfunc
 
@@ -155,6 +174,24 @@ mkHsFunction f ty =
           error $ "Input state type of function " ++ hsname ++ ": " ++ (showSDoc $ ppr state_ty) ++ " does not match output state type: " ++ (showSDoc $ ppr outstate_ty)
       otherwise                -> error $ "Return type of top-level function " ++ hsname ++ " must be a two-tuple containing a state and output ports."
 
+-- | Adds signal names to the given FlatFunction
+nameFlatFunction ::
+  HsFunction
+  -> FuncData
+  -> VHDLState ()
+
+nameFlatFunction hsfunc fdata =
+  let func = flatFunc fdata in
+  case func of
+    -- Skip (builtin) functions without a FlatFunction
+    Nothing -> do return ()
+    -- Name the signals in all other functions
+    Just flatfunc ->
+      let s = flat_sigs flatfunc in
+      let s' = map (\(id, (SignalInfo Nothing use ty)) -> (id, SignalInfo (Just $ "sig_" ++ (show id)) use ty)) s in
+      let flatfunc' = flatfunc { flat_sigs = s' } in
+      setFlatFunc hsfunc flatfunc'
+
 -- | Splits a tuple type into a list of element types, or Nothing if the type
 --   is not a tuple type.
 splitTupleType ::
@@ -172,18 +209,30 @@ splitTupleType ty =
 
 -- | A consise representation of a (set of) ports on a builtin function
 type PortMap = HsValueMap (String, AST.TypeMark)
-{-
+-- | A consise representation of a builtin function
+data BuiltIn = BuiltIn String [PortMap] PortMap
+
+-- | Map a port specification of a builtin function to a VHDL Signal to put in
+--   a VHDLSignalMap
+toVHDLSignalMap :: HsValueMap (String, AST.TypeMark) -> VHDLSignalMap
+toVHDLSignalMap = fmap (\(name, ty) -> (VHDL.mkVHDLId name, ty))
+
 -- | Translate a concise representation of a builtin function to something
 --   that can be put into FuncMap directly.
-make_builtin :: String -> [PortMap] -> PortMap -> (HsFunction, FuncData)
-make_builtin name args res =
-    (hsfunc, (Nothing))
+addBuiltIn :: BuiltIn -> VHDLState ()
+addBuiltIn (BuiltIn name args res) = do
+    addFunc hsfunc
+    setEntity hsfunc entity
   where
     hsfunc = HsFunction name (map useAsPort args) (useAsPort res)
+    entity = Entity (VHDL.mkVHDLId name) (map toVHDLSignalMap args) (toVHDLSignalMap res) Nothing
 
 builtin_funcs = 
   [ 
-    make_builtin "hwxor" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty))
+    BuiltIn "hwxor" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
+    BuiltIn "hwand" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
+    BuiltIn "hwor" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
+    BuiltIn "hwnot" [(Single ("a", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty))
   ]
--}
+
 -- vim: set ts=8 sw=2 sts=2 expandtab: