Remove createEntity from the VHDLState monad.

[matthijs/master-project/cλash.git] / Translator.hs

diff --git a/Translator.hs b/Translator.hs
index 5e36b3856b631666cc4fb62fb932631e21a33943..6a784251d3c310240fc657b8a0c183980cc80202 100644 (file)
--- a/Translator.hs
+++ b/Translator.hs
@@ -92,7 +92,7 @@ moduleToVHDL core list = do
       -- Create entities and architectures for them
       Monad.zipWithM processBind statefuls binds
       modFuncs nameFlatFunction
-      modFuncs VHDL.createEntity
+      modFuncMap $ Map.mapWithKey (\hsfunc fdata -> fdata {funcEntity = VHDL.createEntity hsfunc fdata})
       modFuncs VHDL.createArchitecture
       funcs <- getFuncs
       return $ VHDL.getDesignFiles (map snd funcs)