Remove type parameterisation of SignalMap.

[matthijs/master-project/cλash.git] / Pretty.hs

diff --git a/Pretty.hs b/Pretty.hs
index 65645760959aa7f314633f0848c7a14617d39a5b..ba0e3d01113c05167ca2387fd69dad2ef4b6fdc9 100644 (file)
--- a/Pretty.hs
+++ b/Pretty.hs
@@ -36,7 +36,7 @@ instance Pretty HsValueUse where
   pPrint (State n)       = char 'C' <> int n
   pPrint (HighOrder _ _) = text "Higher Order"
 
-instance Pretty id => Pretty (FlatFunction' id) where
+instance Pretty FlatFunction where
   pPrint (FlatFunction args res apps conds sigs) =
     (text "Args: ") $$ nest 10 (pPrint args)
     $+$ (text "Result: ") $$ nest 10 (pPrint res)
@@ -46,11 +46,11 @@ instance Pretty id => Pretty (FlatFunction' id) where
     where
       ppsig (id, info) = pPrint id <> pPrint info
 
-instance Pretty id => Pretty (FApp id) where
+instance Pretty FApp where
   pPrint (FApp func args res) =
     pPrint func <> text " : " <> pPrint args <> text " -> " <> pPrint res
 
-instance Pretty id => Pretty (CondDef id) where
+instance Pretty CondDef where
   pPrint _ = text "TODO"
 
 instance Pretty SignalInfo where
@@ -61,9 +61,11 @@ instance Pretty SignalInfo where
       ppname (Just name) = text ":" <> text name
 
 instance Pretty SigUse where
-  pPrint SigPort     = text "P"
+  pPrint SigPortIn   = text "PI"
+  pPrint SigPortOut  = text "PO"
   pPrint SigInternal = text "I"
-  pPrint SigState    = text "S"
+  pPrint (SigStateOld n) = text "SO:" <> int n
+  pPrint (SigStateNew n) = text "SN:" <> int n
   pPrint SigSubState = text "s"
 
 instance Pretty VHDLSession where