Almost finished support for 'map'

[matthijs/master-project/cλash.git] / Generate.hs

diff --git a/Generate.hs b/Generate.hs
index 8053f9852a5653107e1f802842727214f14516fb..f81d7692434a7247325f1d1fdc3f1292d23df9b7 100644 (file)
--- a/Generate.hs
+++ b/Generate.hs
@@ -27,10 +27,9 @@ genExprFCall fName args =
 genMapCall :: 
   Int -- | The length of the vector 
   -> Entity -- | The entity to map
-  -> AST.VHDLId -- | The input vector
-  -> AST.VHDLId -- | The output vector
+  -> [AST.VHDLId] -- | The vectors
   -> AST.GenerateSm -- | The resulting generate statement
-genMapCall len entity arg res = genSm
+genMapCall len entity [arg, res] = genSm
   where
     label = AST.unsafeVHDLBasicId "mapVector"
     nPar  = AST.unsafeVHDLBasicId "n"
@@ -62,7 +61,8 @@ genUnconsVectorFuns elemTM vectorTM  =
   , AST.SubProgBody tailSpec    [AST.SPVD tailVar]  [tailExpr, tailRet]         
   , AST.SubProgBody takeSpec    [AST.SPVD takeVar]  [takeExpr, takeRet]         
   , AST.SubProgBody dropSpec    [AST.SPVD dropVar]  [dropExpr, dropRet]    
-  , AST.SubProgBody plusgtSpec  [AST.SPVD plusgtVar] [plusgtExpr, plusgtRet]     
+  , AST.SubProgBody plusgtSpec  [AST.SPVD plusgtVar] [plusgtExpr, plusgtRet]
+  , AST.SubProgBody emptySpec   [AST.SPVD emptyVar] [emptyExpr]    
   ]
   where 
     ixPar   = AST.unsafeVHDLBasicId "ix"
@@ -201,3 +201,12 @@ genUnconsVectorFuns elemTM vectorTM  =
                    ((AST.PrimName $ AST.NSimple aPar) AST.:&: 
                     (AST.PrimName $ AST.NSimple vecPar))
     plusgtRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
+    emptySpec = AST.Function emptyId [] vectorTM
+    emptyVar = 
+          AST.VarDec resId 
+              (AST.SubtypeIn vectorTM
+                (Just $ AST.ConstraintIndex $ AST.IndexConstraint 
+                 [AST.ToRange (AST.PrimLit "0")
+                          (AST.PrimLit "-1")]))
+              Nothing
+    emptyExpr = AST.ReturnSm (Just $ AST.PrimName (AST.NSimple resId))
\ No newline at end of file