Make the hw functions builtin operators instead of components.

[matthijs/master-project/cλash.git] / Generate.hs

diff --git a/Generate.hs b/Generate.hs
index 2beacb8d5616e7c9014f3fef35a6644d02773a49..26c04480f21c385001b81540985668ab4b209b70 100644 (file)
--- a/Generate.hs
+++ b/Generate.hs
@@ -3,6 +3,17 @@ module Generate where
 import qualified ForSyDe.Backend.VHDL.AST as AST
 import Constants
 
+-- | Generate a binary operator application. The first argument should be a
+-- constructor from the AST.Expr type, e.g. AST.And.
+genExprOp2 :: (AST.Expr -> AST.Expr -> AST.Expr) -> [AST.Expr] -> AST.Expr
+genExprOp2 op [arg1, arg2] = op arg1 arg2
+genExprOp2 _ _ = error "Generate.genExprOp2 wrong number of argumetns"
+
+-- | Generate a unary operator application
+genExprOp1 :: (AST.Expr -> AST.Expr) -> [AST.Expr] -> AST.Expr
+genExprOp1 op [arg] = op arg
+genExprOp1 _ _ = error "Generate.genExprOp1 wrong number of argumetns"
+
 -- | Generate a function call from the Function Name and a list of expressions
 --   (its arguments)
 genExprFCall :: AST.VHDLId -> [AST.Expr] -> AST.Expr
@@ -154,4 +165,4 @@ genUnconsVectorFuns elemTM vectorTM  =
                                (AST.PrimName (AST.NAttribute $ 
                                   AST.AttribName (AST.NSimple vecPar) lengthId Nothing) 
                                                              AST.:-: AST.PrimLit "1"))
-    dropRet =  AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
\ No newline at end of file
+    dropRet =  AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)