main = Sim.simulate exec program initial_state
mainIO = Sim.simulateIO exec initial_state
-dontcare = Low
+dontcare = DontCare
program = [
-- (addr, we, op)
where
--Regs r0 r1 = s
(r0, r1) = s
- r0' = if addr == Low then d else r0
- r1' = if addr == High then d else r1
+ r0' = case addr of Low -> d; High -> r0; otherwise -> dontcare
+ r1' = case addr of High -> d; Low -> r1; otherwise -> dontcare
--s' = Regs r0' r1'
s' = (r0', r1')
salu Low a b s = (s, a `hwor` b)
type ExecState = (RegisterBankState, Bit, Bit)
-exec :: (RegAddr, Bit, AluOp) -> ExecState -> (ExecState, ())
+exec :: (RegAddr, Bit, AluOp) -> ExecState -> (ExecState, (Bit))
-- Read & Exec
exec (addr, Low, op) s =
- (s', ())
+ (s', z')
where
(reg_s, t, z) = s
(reg_s', t') = register_bank (addr, Low, dontcare) reg_s
-- Write
exec (addr, High, op) s =
- (s', ())
+ (s', dontcare)
where
(reg_s, t, z) = s
(reg_s', _) = register_bank (addr, High, z) reg_s