Add an invertor hardware model.

[matthijs/master-project/cλash.git] / Adders.hs

diff --git a/Adders.hs b/Adders.hs
index c39857898abaa856a1206107c861115a4b08bfa1..c2810d5b397af025816fa3e0ed5a87e95163ab0d 100644 (file)
--- a/Adders.hs
+++ b/Adders.hs
@@ -10,18 +10,26 @@ show_add f = do print ("Sum:   " ++ (displaysigs s)); print ("Carry: " ++ (displ
     b = [Low, Low, Low, High]
     (s, c) = f (a, b)
 
--- Combinatoric no-carry adder
+-- Not really an adder, but this is nice minimal hardware description
+wire :: Bit -> Bit
+wire a = a
+
+-- Not really an adder either, but a slightly more complex example
+inv :: Bit -> Bit
+inv a = hwnot a
+
+-- Combinatoric stateless no-carry adder
 -- A -> B -> S
 no_carry_adder :: (Bit, Bit) -> Bit
 no_carry_adder (a, b) = a `hwxor` b
 
--- Combinatoric half adder
+-- Combinatoric stateless half adder
 -- A -> B -> (S, C)
 half_adder :: (Bit, Bit) -> (Bit, Bit)
 half_adder (a, b) = 
   ( a `hwxor` b, a `hwand` b )
 
--- Combinatoric (one-bit) full adder
+-- Combinatoric stateless full adder
 -- (A, B, C) -> (S, C)
 full_adder :: (Bit, Bit, Bit) -> (Bit, Bit)
 full_adder (a, b, cin) = (s, c)