Keys for typemap can now deal with vector lengths based on type operators

[matthijs/master-project/cλash.git] / Adders.hs

diff --git a/Adders.hs b/Adders.hs
index 249bb3a4ef983a84f7f3074f131934688b2974b3..9e78fcf87dd6a0b4c431133b5e6ad5bbfb9b918e 100644 (file)
--- a/Adders.hs
+++ b/Adders.hs
@@ -1,9 +1,16 @@
 module Adders where
 import Bits
 import qualified Sim
+
+import qualified Prelude as P
+import Prelude hiding (
+  null, length, head, tail, last, init, take, drop, (++), map, foldl, foldr,
+  zipWith, zip, unzip, concat, reverse, iterate )
+
 import Language.Haskell.Syntax
-import qualified Data.TypeLevel as TypeLevel
-import qualified Data.Param.FSVec as FSVec
+import Types
+import Data.Param.TFVec
+import Data.RangedWord
 
 mainIO f = Sim.simulateIO (Sim.stateless f) ()
 
@@ -12,7 +19,7 @@ mainIO f = Sim.simulateIO (Sim.stateless f) ()
 stateless :: (i -> o) -> (i -> () -> ((), o))
 stateless f = \i s -> (s, f i)
 
-show_add f = do print ("Sum:   " ++ (displaysigs s)); print ("Carry: " ++ (displaysig c))
+show_add f = do print ("Sum:   " P.++ (displaysigs s)); print ("Carry: " P.++ (displaysig c))
   where
     a = [High, High, High, High]
     b = [Low, Low, Low, High]
@@ -26,10 +33,10 @@ mux2 High (a, b) = b
 wire :: Bit -> Bit
 wire a = a
 
-bus :: (TypeLevel.Pos len) => BitVec len -> BitVec len
+-- bus :: (TypeLevel.Pos len) => BitVec len -> BitVec len
 bus v = v
 
-bus_4 :: BitVec TypeLevel.D4 -> BitVec TypeLevel.D4
+-- bus_4 :: BitVec TypeLevel.D4 -> BitVec TypeLevel.D4
 bus_4 v = v
 
 {-
@@ -146,26 +153,65 @@ rec_adder ((a:as), (b:bs)) =
     (rest, cin) = rec_adder (as, bs)
     (s, cout) = full_adder (a, b, cin)
 
+foo = id
+add, sub :: Int -> Int -> Int
+add a b = a + b
+sub a b = a - b
+
+highordtest = \x ->
+  let s = foo x
+  in
+     case s of
+       (a, b) ->
+         case a of
+           High -> add
+           Low -> let
+             op' = case b of
+                High -> sub
+                Low -> \c d -> c
+             in
+                \c d -> op' d c
+
+xand a b = hwand a b
+
+functiontest :: TFVec D4 (TFVec D3 Bit) -> (TFVec D12 Bit, TFVec D3 Bit, TFVec D3 (TFVec D3 Bit))
+functiontest = \v -> let r = (concat v, head v, tail v) in r
+
+xhwnot x = hwnot x
+
+maptest :: TFVec D4 Bit -> TFVec D4 Bit
+maptest = \v -> let r = map xhwnot v in r
+
+highordtest2 = \a b ->
+         case a of
+           High -> \c d -> d
+           Low -> let
+             op' :: Bit -> Bit -> Bit
+             op' = case b of
+                High -> \c d -> d
+                Low -> \c d -> c
+             in
+                \c d -> op' d c
 -- Four bit adder, using the continous adder below
 -- [a] -> [b] -> ([s], cout)
---con_adder_4 as bs = 
---  ([s3, s2, s1, s0], c)
---  where
---    ((s0, _):(s1, _):(s2, _):(s3, c):_) = con_adder (zip ((reverse as) ++ lows) ((reverse bs) ++ lows))
+con_adder_4 as bs = 
+ ([s3, s2, s1, s0], c)
+ where
+   ((s0, _):(s1, _):(s2, _):(s3, c):_) = con_adder (P.zip ((P.reverse as) P.++ lows) ((P.reverse bs) P.++ lows))
 
 -- Continuous sequential version
 -- Stream a -> Stream b -> Stream (sum, cout)
---con_adder :: Stream (Bit, Bit) -> Stream (Bit, Bit)
+con_adder :: Stream (Bit, Bit) -> Stream (Bit, Bit)
 
 -- Forward to con_adder_int, but supply an initial state
---con_adder pin =
---  con_adder_int pin Low
+con_adder pin =
+ con_adder_int pin Low
 
 -- Stream a -> Stream b -> state -> Stream (s, c)
---con_adder_int :: Stream (Bit, Bit) -> Bit -> Stream (Bit, Bit)
---con_adder_int ((a,b):rest) cin =
---  (s, cout) : con_adder_int rest cout
---  where
---    (s, cout) = full_adder a b cin
+con_adder_int :: Stream (Bit, Bit) -> Bit -> Stream (Bit, Bit)
+con_adder_int ((a,b):rest) cin =
+ (s, cout) : con_adder_int rest cout
+ where
+   (s, cout) = full_adder (a, b, cin)
 
 -- vim: set ts=8 sw=2 sts=2 expandtab: