Put a comment on UniqSupply generation back.

[matthijs/master-project/cλash.git] / Adders.hs

diff --git a/Adders.hs b/Adders.hs
index 672c83c964fe630f154a802bf2feb8160865ac0d..6529642f4758ad640b1b93e736ef566e4b1f63eb 100644 (file)
--- a/Adders.hs
+++ b/Adders.hs
@@ -1,3 +1,5 @@
+{-# LANGUAGE TemplateHaskell #-}
+
 module Adders where
 import Bits
 import qualified Sim
@@ -11,6 +13,8 @@ import Language.Haskell.Syntax
 import Types
 import Data.Param.TFVec
 import Data.RangedWord
+import Data.SizedInt
+import Data.SizedWord
 
 mainIO f = Sim.simulateIO (Sim.stateless f) ()
 
@@ -174,9 +178,12 @@ highordtest = \x ->
 
 xand a b = hwand a b
 
-functiontest :: TFVec D4 (TFVec D3 Bit) -> TFVec D12 Bit
+functiontest :: TFVec D3 (TFVec D4 Bit) -> TFVec D12 Bit
 functiontest = \v -> let r = concat v in r
 
+functiontest2 :: SizedInt D8 -> SizedInt D7
+functiontest2 = \a -> let r = Data.SizedInt.resize a in r
+
 xhwnot x = hwnot x
 
 maptest :: TFVec D4 Bit -> TFVec D4 Bit