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Clean up source files:
[matthijs/master-project/cλash.git]
/
cλash
/
CLasH
/
VHDL
/
Constants.hs
diff --git
a/cλash/CLasH/VHDL/Constants.hs
b/cλash/CLasH/VHDL/Constants.hs
index 71c1c2135b7b1b1d092505279bf91388577d2b5a..22bf14aabaac4e047905c5b8d7cf916fc9cc6768 100644
(file)
--- a/
cλash/CLasH/VHDL/Constants.hs
+++ b/
cλash/CLasH/VHDL/Constants.hs
@@
-1,5
+1,6
@@
module CLasH.VHDL.Constants where
module CLasH.VHDL.Constants where
-
+
+-- VHDL Imports
import qualified Language.VHDL.AST as AST
--------------
import qualified Language.VHDL.AST as AST
--------------
@@
-235,6
+236,9
@@
fstId = "fst"
sndId :: String
sndId = "snd"
sndId :: String
sndId = "snd"
+splitId :: String
+splitId = "split"
+
-- Equality Operations
equalityId :: String
equalityId = "=="
-- Equality Operations
equalityId :: String
equalityId = "=="
@@
-242,6
+246,18
@@
equalityId = "=="
inEqualityId :: String
inEqualityId = "/="
inEqualityId :: String
inEqualityId = "/="
+gtId :: String
+gtId = ">"
+
+ltId :: String
+ltId = "<"
+
+gteqId :: String
+gteqId = ">="
+
+lteqId :: String
+lteqId = "<="
+
boolOrId :: String
boolOrId = "||"
boolOrId :: String
boolOrId = "||"
@@
-285,6
+301,12
@@
toUnsignedId = "to_unsigned"
resizeId :: String
resizeId = "resize"
resizeId :: String
resizeId = "resize"
+resizeWordId :: String
+resizeWordId = "resizeWord"
+
+resizeIntId :: String
+resizeIntId = "resizeInt"
+
smallIntegerId :: String
smallIntegerId = "smallInteger"
smallIntegerId :: String
smallIntegerId = "smallInteger"