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Let classoperationresolution handle partially inlined dictionaries.
[matthijs/master-project/cλash.git]
/
cλash
/
CLasH
/
VHDL
/
Constants.hs
diff --git
a/cλash/CLasH/VHDL/Constants.hs
b/cλash/CLasH/VHDL/Constants.hs
index b0236f5364351ec63b333aabc1940c34193d1259..22bf14aabaac4e047905c5b8d7cf916fc9cc6768 100644
(file)
--- a/
cλash/CLasH/VHDL/Constants.hs
+++ b/
cλash/CLasH/VHDL/Constants.hs
@@
-1,5
+1,6
@@
module CLasH.VHDL.Constants where
module CLasH.VHDL.Constants where
-
+
+-- VHDL Imports
import qualified Language.VHDL.AST as AST
--------------
import qualified Language.VHDL.AST as AST
--------------
@@
-229,9
+230,39
@@
hwandId = "hwand"
lengthTId :: String
lengthTId = "lengthT"
lengthTId :: String
lengthTId = "lengthT"
+fstId :: String
+fstId = "fst"
+
+sndId :: String
+sndId = "snd"
+
+splitId :: String
+splitId = "split"
+
-- Equality Operations
-- Equality Operations
-equalsId :: String
-equalsId = "=="
+equalityId :: String
+equalityId = "=="
+
+inEqualityId :: String
+inEqualityId = "/="
+
+gtId :: String
+gtId = ">"
+
+ltId :: String
+ltId = "<"
+
+gteqId :: String
+gteqId = ">="
+
+lteqId :: String
+lteqId = "<="
+
+boolOrId :: String
+boolOrId = "||"
+
+boolAndId :: String
+boolAndId = "&&"
-- Numeric Operations
-- Numeric Operations
@@
-270,6
+301,12
@@
toUnsignedId = "to_unsigned"
resizeId :: String
resizeId = "resize"
resizeId :: String
resizeId = "resize"
+resizeWordId :: String
+resizeWordId = "resizeWord"
+
+resizeIntId :: String
+resizeIntId = "resizeInt"
+
smallIntegerId :: String
smallIntegerId = "smallInteger"
smallIntegerId :: String
smallIntegerId = "smallInteger"
@@
-279,6
+316,9
@@
sizedIntId = "SizedInt"
tfvecId :: String
tfvecId = "TFVec"
tfvecId :: String
tfvecId = "TFVec"
+blockRAMId :: String
+blockRAMId = "blockRAM"
+
-- | output file identifier (from std.textio)
showIdString :: String
showIdString = "show"
-- | output file identifier (from std.textio)
showIdString :: String
showIdString = "show"