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Add a trailing newline to HighOrdAlu.
[matthijs/master-project/cλash.git]
/
cλash
/
CLasH
/
HardwareTypes.hs
diff --git
a/cλash/CLasH/HardwareTypes.hs
b/cλash/CLasH/HardwareTypes.hs
index c3eaf4396ef0eb2c65c991cfabdeef9eacd2a986..e6e84fd8a33a13aade58bbf5d4167552ba4afab0 100644
(file)
--- a/
cλash/CLasH/HardwareTypes.hs
+++ b/
cλash/CLasH/HardwareTypes.hs
@@
-10,6
+10,8
@@
module CLasH.HardwareTypes
, Bit(..)
, State(..)
, Vector
, Bit(..)
, State(..)
, Vector
+ , resizeInt
+ , resizeWord
, hwand
, hwor
, hwxor
, hwand
, hwor
, hwxor
@@
-27,8
+29,10
@@
import Types
import qualified Data.Param.TFVec as TFVec
import Data.Param.TFVec hiding (TFVec)
import Data.RangedWord
import qualified Data.Param.TFVec as TFVec
import Data.Param.TFVec hiding (TFVec)
import Data.RangedWord
-import Data.SizedInt
-import Data.SizedWord
+import qualified Data.SizedInt as SizedInt
+import Data.SizedInt hiding (resize)
+import qualified Data.SizedWord as SizedWord
+import Data.SizedWord hiding (resize)
import Language.Haskell.TH.Lift
import Data.Typeable
import Language.Haskell.TH.Lift
import Data.Typeable
@@
-37,6
+41,12
@@
newtype State s = State s deriving (P.Show)
type Vector = TFVec.TFVec
type Vector = TFVec.TFVec
+resizeInt :: (NaturalT nT, NaturalT nT') => SizedInt nT -> SizedInt nT'
+resizeInt = SizedInt.resize
+
+resizeWord :: (NaturalT nT, NaturalT nT') => SizedWord nT -> SizedWord nT'
+resizeWord = SizedWord.resize
+
-- The plain Bit type
data Bit = High | Low
deriving (P.Show, P.Eq, P.Read, Typeable)
-- The plain Bit type
data Bit = High | Low
deriving (P.Show, P.Eq, P.Read, Typeable)
@@
-74,13
+84,14
@@
blockRAM ::
a ->
RangedWord s ->
RangedWord s ->
a ->
RangedWord s ->
RangedWord s ->
- B
it
->
+ B
ool
->
((MemState s a), a )
blockRAM (State mem) data_in rdaddr wraddr wrenable =
((State mem'), data_out)
where
data_out = mem!rdaddr
-- Only write data_in to memory if write is enabled
((MemState s a), a )
blockRAM (State mem) data_in rdaddr wraddr wrenable =
((State mem'), data_out)
where
data_out = mem!rdaddr
-- Only write data_in to memory if write is enabled
- mem' = case wrenable of
- Low -> mem
- High -> replace mem wraddr data_in
+ mem' = if wrenable then
+ replace mem wraddr data_in
+ else
+ mem