ent_args :: [VHDLSignalMap], -- A mapping of each function argument to port names
ent_res :: VHDLSignalMap, -- A mapping of the function result to port names
ent_decl :: Maybe AST.EntityDec -- The actual entity declaration. Can be empty for builtin functions.
ent_args :: [VHDLSignalMap], -- A mapping of each function argument to port names
ent_res :: VHDLSignalMap, -- A mapping of the function result to port names
ent_decl :: Maybe AST.EntityDec -- The actual entity declaration. Can be empty for builtin functions.