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Added builtin foldl function
[matthijs/master-project/cλash.git]
/
VHDLTypes.hs
diff --git
a/VHDLTypes.hs
b/VHDLTypes.hs
index d23daea033d77b38710b5fe6c09fcbfaae2be62f..a533bf5989c0367ac5c62bf473299287df163127 100644
(file)
--- a/
VHDLTypes.hs
+++ b/
VHDLTypes.hs
@@
-76,7
+76,7
@@
type VHDLSession = State.State VHDLState
-- | A substate containing just the types
type TypeState = State.State TypeMap
-- | A substate containing just the types
type TypeState = State.State TypeMap
-type Builder = Either (CoreSyn.CoreBndr -> [AST.Expr] -> VHDLSession AST.Expr) (Entity -> [CoreSyn.CoreBndr] -> VHDLSession AST.
Generate
Sm)
+type Builder = Either (CoreSyn.CoreBndr -> [AST.Expr] -> VHDLSession AST.Expr) (Entity -> [CoreSyn.CoreBndr] -> VHDLSession AST.
Conc
Sm)
-- A map of a builtin function to VHDL function builder
type NameTable = Map.Map String (Int, Builder )
-- A map of a builtin function to VHDL function builder
type NameTable = Map.Map String (Int, Builder )