+ (sigName info)
+ ty = sigTy info
+
+-- | Create the VHDL AST for an entity
+createEntityAST ::
+ HsFunction -- | The signature of the function we're working with
+ -> [VHDLSignalMap] -- | The entity's arguments
+ -> VHDLSignalMap -- | The entity's result
+ -> AST.EntityDec -- | The entity with the ent_decl filled in as well
+
+createEntityAST hsfunc args res =
+ AST.EntityDec vhdl_id ports
+ where
+ vhdl_id = mkEntityId hsfunc
+ ports = concatMap (mapToPorts AST.In) args
+ ++ mapToPorts AST.Out res
+ mapToPorts :: AST.Mode -> VHDLSignalMap -> [AST.IfaceSigDec]
+ mapToPorts mode m =
+ map (mkIfaceSigDec mode) (Foldable.toList m)
+
+-- | Create a port declaration
+mkIfaceSigDec ::
+ AST.Mode -- | The mode for the port (In / Out)
+ -> (AST.VHDLId, AST.TypeMark) -- | The id and type for the port
+ -> AST.IfaceSigDec -- | The resulting port declaration
+
+mkIfaceSigDec mode (id, ty) = AST.IfaceSigDec id mode ty
+
+-- | Generate a VHDL entity name for the given hsfunc
+mkEntityId hsfunc =
+ -- TODO: This doesn't work for functions with multiple signatures!
+ mkVHDLId $ hsFuncName hsfunc
+
+-- | Create an architecture for a given function
+createArchitecture ::
+ HsFunction -- | The function signature
+ -> FuncData -- | The function data collected so far
+ -> VHDLState ()
+
+createArchitecture hsfunc fdata =
+ let func = flatFunc fdata in
+ case func of
+ -- Skip (builtin) functions without a FlatFunction
+ Nothing -> do return ()
+ -- Create an architecture for all other functions
+ Just flatfunc ->
+ let
+ sigs = flat_sigs flatfunc
+ args = flat_args flatfunc
+ res = flat_res flatfunc
+ apps = flat_apps flatfunc
+ entity_id = Maybe.fromMaybe
+ (error $ "Building architecture without an entity? This should not happen!")
+ (getEntityId fdata)
+ -- Create signal declarations for all signals that are not in args and
+ -- res
+ sig_decs = [mkSigDec info | (id, info) <- sigs, (all (id `Foldable.notElem`) (res:args)) ]
+ -- Create component instantiations for all function applications
+ insts = map (AST.CSISm . mkCompInsSm) apps
+ arch = AST.ArchBody (mkVHDLId "structural") (AST.NSimple entity_id) (map AST.BDISD sig_decs) insts
+ in
+ setArchitecture hsfunc arch
+
+mkSigDec :: SignalInfo -> AST.SigDec
+mkSigDec info =
+ AST.SigDec (mkVHDLId name) (vhdl_ty ty) Nothing
+ where
+ name = Maybe.fromMaybe
+ (error $ "Unnamed signal? This should not happen!")
+ (sigName info)
+ ty = sigTy info
+
+-- | Transforms a flat function application to a VHDL component instantiation.
+mkCompInsSm ::
+ FApp UnnamedSignal -- | The application to look at.
+ -> AST.CompInsSm -- | The corresponding VHDL component instantiation.
+
+mkCompInsSm app =
+ AST.CompInsSm label (AST.IUEntity (AST.NSimple entity_id)) (AST.PMapAspect portmaps)
+ where
+ entity_id = mkVHDLId "foo"
+ label = mkVHDLId "app"
+ portmaps = []