--- | Transforms a flat function application to a VHDL component instantiation.
-mkCompInsSm ::
- [(UnnamedSignal, SignalInfo)] -- | The signals in the current architecture
- -> FApp UnnamedSignal -- | The application to look at.
- -> VHDLState AST.CompInsSm -- | The corresponding VHDL component instantiation.
+-- | Transforms a signal definition into a VHDL concurrent statement
+mkConcSm ::
+ [(SignalId, SignalInfo)] -- | The signals in the current architecture
+ -> SigDef -- | The signal definition
+ -> VHDLState AST.ConcSm -- | The corresponding VHDL component instantiation.