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Support multiple alternative case expressions.
[matthijs/master-project/cλash.git]
/
Translator.hs
diff --git
a/Translator.hs
b/Translator.hs
index cf2fb966876c5ffd612d00360dfe772a4adf2110..98380606884c24ba953a07216d1bb788d1747d22 100644
(file)
--- a/
Translator.hs
+++ b/
Translator.hs
@@
-43,9
+43,9
@@
import qualified VHDL
main = do
-- Load the module
main = do
-- Load the module
- core <- loadModule "A
dders
.hs"
+ core <- loadModule "A
lu
.hs"
-- Translate to VHDL
-- Translate to VHDL
- vhdl <- moduleToVHDL core ["s
hifter
"]
+ vhdl <- moduleToVHDL core ["s
alu
"]
-- Write VHDL to file
writeVHDL vhdl "../vhdl/vhdl/output.vhdl"
-- Write VHDL to file
writeVHDL vhdl "../vhdl/vhdl/output.vhdl"