projects
/
matthijs
/
master-project
/
cλash.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
Remove some commented out code.
[matthijs/master-project/cλash.git]
/
Sim.hs
diff --git
a/Sim.hs
b/Sim.hs
index 3be038d3b11d8bfef33de0dde4be1fdc5927aa22..5a8fe2d56c9b3a808619bf04c86127d6b065f3c8 100644
(file)
--- a/
Sim.hs
+++ b/
Sim.hs
@@
-1,4
+1,4
@@
-module Sim (simulate,
Circuit, simulateIO
) where
+module Sim (simulate,
SCircuit, Circuit, simulateIO, stateless
) where
import Data.Typeable
simulate f input s = do
import Data.Typeable
simulate f input s = do
@@
-12,23
+12,24
@@
simulate f input s = do
output = run f input s
-- A circuit with input of type a, state of type s and output of type b
output = run f input s
-- A circuit with input of type a, state of type s and output of type b
-type Circuit i s o = i -> s -> (s, o)
+type SCircuit i s o = i -> s -> (s, o)
+type Circuit i o = i -> o
-run :: Circuit i s o -> [i] -> s -> [(i, o, s)]
+run ::
S
Circuit i s o -> [i] -> s -> [(i, o, s)]
run f (i:input) s =
(i, o, s'): (run f input s')
where
(s', o) = f i s
run _ [] _ = []
run f (i:input) s =
(i, o, s'): (run f input s')
where
(s', o) = f i s
run _ [] _ = []
-simulateIO :: (Read i, Show i, Show o, Show s) => S
im.
Circuit i s o -> s -> IO()
+simulateIO :: (Read i, Show i, Show o, Show s) => SCircuit i s o -> s -> IO()
simulateIO c s = do
putStr "Initial State: "
putStr $ show s
putStr "\n\n"
runIO c s
simulateIO c s = do
putStr "Initial State: "
putStr $ show s
putStr "\n\n"
runIO c s
-runIO :: (Read i, Show i, Show o, Show s) => S
im.
Circuit i s o -> s -> IO()
+runIO :: (Read i, Show i, Show o, Show s) => SCircuit i s o -> s -> IO()
runIO f s = do
putStr "\nInput? "
line <- getLine
runIO f s = do
putStr "\nInput? "
line <- getLine
@@
-49,4
+50,10
@@
printOutput (i, o, s) = do
putStr "\nNew State: "
putStr $ show s
putStr "\n\n"
putStr "\nNew State: "
putStr $ show s
putStr "\n\n"
+
+-- Takes a stateless circuit and turns it into a stateful circuit (with an
+-- empty state) so it can be used in simulation
+stateless :: Circuit i o -> SCircuit i () o
+stateless f = \i s -> (s, f i)
+
-- vim: set ts=8 sw=2 sts=2 expandtab:
-- vim: set ts=8 sw=2 sts=2 expandtab: