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Generate VHDL signals for internal signals and state.
[matthijs/master-project/cλash.git]
/
Pretty.hs
diff --git
a/Pretty.hs
b/Pretty.hs
index dd8e4eea33cac26e083046ca63434f4e19e02cf6..7c9840450339be35f57184f950824042fcc41283 100644
(file)
--- a/
Pretty.hs
+++ b/
Pretty.hs
@@
-15,6
+15,11
@@
import FlattenTypes
import TranslatorTypes
import VHDLTypes
import TranslatorTypes
import VHDLTypes
+-- | A version of the default pPrintList method, which uses a custom function
+-- f instead of pPrint to print elements.
+printList :: (a -> Doc) -> [a] -> Doc
+printList f = brackets . fsep . punctuate comma . map f
+
instance Pretty HsFunction where
pPrint (HsFunction name args res) =
text name <> char ' ' <> parens (hsep $ punctuate comma args') <> text " -> " <> res'
instance Pretty HsFunction where
pPrint (HsFunction name args res) =
text name <> char ' ' <> parens (hsep $ punctuate comma args') <> text " -> " <> res'
@@
-37,7
+42,9
@@
instance Pretty id => Pretty (FlatFunction' id) where
$+$ (text "Result: ") $$ nest 10 (pPrint res)
$+$ (text "Apps: ") $$ nest 10 (vcat (map pPrint apps))
$+$ (text "Conds: ") $$ nest 10 (pPrint conds)
$+$ (text "Result: ") $$ nest 10 (pPrint res)
$+$ (text "Apps: ") $$ nest 10 (vcat (map pPrint apps))
$+$ (text "Conds: ") $$ nest 10 (pPrint conds)
- $+$ text "Signals: " $$ nest 10 (pPrint sigs)
+ $+$ text "Signals: " $$ nest 10 (printList ppsig sigs)
+ where
+ ppsig (id, info) = pPrint id <> pPrint info
instance Pretty id => Pretty (FApp id) where
pPrint (FApp func args res) =
instance Pretty id => Pretty (FApp id) where
pPrint (FApp func args res) =
@@
-54,9
+61,11
@@
instance Pretty SignalInfo where
ppname (Just name) = text ":" <> text name
instance Pretty SigUse where
ppname (Just name) = text ":" <> text name
instance Pretty SigUse where
- pPrint SigPort = text "P"
+ pPrint SigPortIn = text "PI"
+ pPrint SigPortOut = text "PO"
pPrint SigInternal = text "I"
pPrint SigInternal = text "I"
- pPrint SigState = text "S"
+ pPrint (SigStateOld n) = text "SO:" <> int n
+ pPrint (SigStateNew n) = text "SN:" <> int n
pPrint SigSubState = text "s"
instance Pretty VHDLSession where
pPrint SigSubState = text "s"
instance Pretty VHDLSession where