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Correctly handle negate for unsigned integers
[matthijs/master-project/cλash.git]
/
Alu.hs
diff --git
a/Alu.hs
b/Alu.hs
index 17978204628b47ae06953944a9fbffd49c08205f..b3d5b220f13970bc123ccafd776dab62ffa483dd 100644
(file)
--- a/
Alu.hs
+++ b/
Alu.hs
@@
-2,7
+2,7
@@
module Alu where
import Bits
import qualified Sim
import Data.SizedWord
import Bits
import qualified Sim
import Data.SizedWord
-import Types
.Data.Num
+import Types
main = Sim.simulate exec program initial_state
mainIO = Sim.simulateIO exec initial_state
main = Sim.simulate exec program initial_state
mainIO = Sim.simulateIO exec initial_state
@@
-58,8
+58,8
@@
alu :: AluOp -> Word -> Word -> Word
{-# NOINLINE alu #-}
--alu High a b = a `hwand` b
--alu Low a b = a `hwor` b
{-# NOINLINE alu #-}
--alu High a b = a `hwand` b
--alu Low a b = a `hwor` b
-alu High a b = a
-alu Low a b = b
+alu High a b = a
+ b
+alu Low a b =
a -
b
type ExecState = (RegisterBankState, Word, Word)
exec :: (RegAddr, Bit, AluOp) -> ExecState -> (ExecState, Word)
type ExecState = (RegisterBankState, Word, Word)
exec :: (RegAddr, Bit, AluOp) -> ExecState -> (ExecState, Word)