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Only force a stateful interface for top level functions.
[matthijs/master-project/cλash.git]
/
Alu.hs
diff --git
a/Alu.hs
b/Alu.hs
index b888fc9dca18419523a4b33234c6e8e900d083ac..07c0d0dfb076b46e0725ad4400698b12f41a616f 100644
(file)
--- a/
Alu.hs
+++ b/
Alu.hs
@@
-1,4
+1,4
@@
-module Alu
(main)
where
+module Alu where
import Bits
import qualified Sim
import Bits
import qualified Sim
@@
-45,9
+45,9
@@
register_bank (addr, High, d) s = -- Write
type AluOp = Bit
type AluOp = Bit
-alu ::
(AluOp, Bit, Bit)
-> Bit
-alu
(High, a, b)
= a `hwand` b
-alu
(Low, a, b)
= a `hwor` b
+alu ::
AluOp -> Bit -> Bit
-> Bit
+alu
High a b
= a `hwand` b
+alu
Low a b
= a `hwor` b
type ExecState = (RegisterBankState, Bit, Bit)
exec :: (RegAddr, Bit, AluOp) -> ExecState -> (ExecState, ())
type ExecState = (RegisterBankState, Bit, Bit)
exec :: (RegAddr, Bit, AluOp) -> ExecState -> (ExecState, ())
@@
-58,7
+58,7
@@
exec (addr, Low, op) s =
where
(reg_s, t, z) = s
(reg_s', t') = register_bank (addr, Low, DontCare) reg_s
where
(reg_s, t, z) = s
(reg_s', t') = register_bank (addr, Low, DontCare) reg_s
- z' = alu
(op, t', t)
+ z' = alu
op t' t
s' = (reg_s', t', z')
-- Write
s' = (reg_s', t', z')
-- Write